Commit Graph

8 Commits

Author SHA1 Message Date
Grzegorz Bernacki
e3ac97538c pci: Implement new memory and io space allocator for PCI.
Cleanup code and move initializing bridge into separate function.
Add checking of PCI mode (RC or endpoint).

Obtained from:	Semihalf
2012-09-14 09:57:41 +00:00
Grzegorz Bernacki
d65cdf4b9d Add support for Armada XP A0.
- Add functions to calculate clocks instead using hardcoded values
- Update reset and timers functions
- Update number of interrupts
- Change name of platform from db88f78100 to db78460
- Correct DRAM size and PCI IRQ routing in dts file.

Obtained from:	Semihalf
2012-09-14 09:55:19 +00:00
Oleksandr Tymoshenko
16694521fe Merging of projects/armv6, part 7
Add Marvell ARMADA XP support

Obtained from:	Marvell, Semihalf
2012-08-15 05:15:49 +00:00
Warner Losh
c358d6a2b0 Trim trailing whitespace... 2012-06-13 04:59:00 +00:00
Grzegorz Bernacki
b91fab4255 Add architecture dependent code to support NAND Framework on Marvell SoCs.
Obtained from: Semihalf
Supported by:  FreeBSD Foundation, Juniper Networks
2012-05-18 14:41:14 +00:00
Rafal Jaworowski
db5ef4fc77 Convert Marvell ARM platforms to FDT convention.
The following systems are involved:

  - DB-88F5182
  - DB-88F5281
  - DB-88F6281
  - DB-78100
  - SheevaPlug

This overhaul covers the following major changes:

  - All integrated peripherals drivers for Marvell ARM SoC, which are
    currently in the FreeBSD source tree are reworked and adjusted so they
    derive config data out of the device tree blob (instead of hard coded /
    tabelarized values).

  - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
    good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation.
2010-06-13 13:28:53 +00:00
Rafal Jaworowski
ebeaf70342 Enable all populated TWSI (I2C) controllers on Marvell SOCs.
Obtained from:	Semihalf
2009-06-25 10:03:51 +00:00
Marcel Moolenaar
85fc5c3b93 Move the memory layout definitions and logic from mvreg.h to mvwin.h
so that it isn't exposured unless needed. In particular this means
that it's easier to tune the memory layout based on board details.
While here, remove inclusion of <machine/intr.h> from mvreg.h. This
also contains exposure to SoC specifics in MI drivers, because NIRQ
depends on the SoC.
2009-06-12 20:00:38 +00:00