Commit Graph

21 Commits

Author SHA1 Message Date
Alexander Motin
f45946a8f7 Avoid false positive probe on ICH6 chipsets. 2009-12-25 07:59:31 +00:00
Alexander Motin
45e1aff18a Clear all ports interrupt status bits in single write. Clearing one by one
causes additional MSIs messages sent if several ports asked for attention
same time. Time window before clearing is not important, as these interrupts
are level triggered by interrupt source.
2009-12-21 21:27:56 +00:00
Alexander Motin
a48eed8352 Add Asynchronous Notification support for controllers without SNTF
capability by snooping SDB FIS receive area. It should be even faster
then regular way, but less reliable.
2009-12-06 23:56:54 +00:00
Alexander Motin
b447e682d6 MFp4:
Improve ATA mode/SATA revision control.
2009-11-26 08:49:46 +00:00
Alexander Motin
c8039fc667 MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.
2009-11-24 12:47:58 +00:00
Alexander Motin
9ece9ab1eb Do not attach JMicrons with single PCI function. They are not working as
AHCI for some reason, even when declaring so. Let atajmicron configure
them for us and provide PATA support.
2009-11-23 18:07:28 +00:00
Alexander Motin
6bd8779bb9 Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.
2009-11-16 15:38:27 +00:00
Alexander Motin
49b96d25da MFp4:
Check SNCQ HBA capability bit when reporting NCQ support to CAM.
2009-11-14 20:06:04 +00:00
Alexander Motin
30a4094f86 MFp4:
- Move tagged queueing control from ADA to ATA XPT. It allows to control
  device command queue length correctly. First step to support < 32 tags.
- Limit queue for non-tagged devices by 2 slots for ahci(4) and siis(4).
- Implement quirk matching for ATA devices.
- Move xpt_schedule_dev_sendq() from header to source file.
- Move delayed queue shrinking to the more expected place - element freeing.
- Remove some SCSIsms in ATA.
2009-11-11 11:10:36 +00:00
Alexander Motin
8e57bf8357 MFp4:
Add set of chip IDs, known to support AHCI.
2009-11-11 10:44:09 +00:00
Alexander Motin
a69552e4b6 MFp4:
- Handle timeouts and fatal errors with port hard-reset. The rest of
recovery will be done by XPT on receiving async event. More gracefull
per-device soft-reset recovery can be implemented later.
- Add workaround for ATI SB600/SB700 PMP probe related bug, to speedup boot.
2009-11-03 11:47:07 +00:00
Alexander Motin
c269e21049 Revert interrupt reason check order back.
ATAPI errors may set IF bit together with TFE.
2009-10-23 13:07:22 +00:00
Alexander Motin
8e7cccb3bd MFp4:
Report real max_target = 15. SIM doesn't need to know that target 15 is PMP.
It is XPT business.
2009-10-21 13:00:01 +00:00
Alexander Motin
a1aa38dedf MFp4:
On error, freeze device queue, to allow periph driver to do proper recovery.
Freeze SIM queue only in some cases, when it is needed to protect SIM.

Implement better command timeout detection logic for non-queued commands.
This fixes false positives when command with short timeout waiting for the
long one. For example, when hald tastes CD during burning process.

Read and clear SERR register on interrupt.
2009-10-21 12:42:25 +00:00
Alexander Motin
660d482a4e On command timeout handle frozen command first, to not run it inside
XXX_end_transaction().

Submitted by:	avg
2009-10-07 15:40:04 +00:00
Alexander Motin
aed39f0d65 To save small bit of CPU time, hide part of SNTF register read latency
behind other reads.
2009-09-06 21:22:24 +00:00
Alexander Motin
ce531e6b83 Round maxio for ATI SB600 to 64K.
Submitted by:	scottl@
2009-09-03 19:02:17 +00:00
Alexander Motin
19dbe46d28 ATI SB600 can't handle 256 sectors transfers with FPDMA (NCQ).
MFC after:	3 days
2009-09-03 12:37:17 +00:00
Alexander Motin
4e931d3116 Fix build with INVARIANTS. 2009-08-30 19:40:09 +00:00
Alexander Motin
4dbabf1049 MFp4:
- Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.
2009-08-30 15:20:13 +00:00
Scott Long
52c9ce25d8 Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re
2009-07-10 08:18:08 +00:00