A lot of dts files define the SPI flashes supported by mx25l as
compatible with 'jedec,spi-nor', so we add this to the mx25l
compat_data.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5962
Introduce 2 new flags:
- FL_ENABLE_4B_ADDR (forces the use of 4-byte addresses)
- FL_DISABLE_4B_ADDR (forces the use of 3-byte addresses)
If an SPI flash chip is defined with FL_ENABLE_4B_ADDR in its flags,
then an 'Enter 4-byte mode' command is sent to the chip at attach time
and, later, all commands that require addressing are issued with 4-byte
addresses.
If an SPI flash chip is defined with FL_DISABLE_4B_ADDR in its flags,
then an 'Exit 4-byte mode' command is sent to the chip at attach time
and, later, all commands that require addressing are issued with 3-byte
addresses.
For chips that do not have any of these flags defined the behaviour is
unchanged.
This change also adds support for the MX25L25735F and MX25L25635E chips
(vendor id 0xc2, device id 0x2019), which support 4-byte mode and enables
4-byte mode for them. These are 256Mbit devices (32MiB) and, as such, can
only be fully addressed by using 4-byte addresses.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5808
This teaches the mx25l driver (sys/dev/flash/mx25l.c) to interact with
sys/dev/fdt/fdt_slicer.c and sys/geom/geom_flashmap.c.
This allows systems with SPI flash to benefit from the possibility to define
flash 'slices' via FDT, just the same way that it's currently possible for
CFI and NAND flashes.
Tested:
* Carambola 2, AR9331 + SPI NOR flash
PR: kern/206227
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
the larger, aligned write+erase sizes the driver currently implements.
This preserves write behaviour but makes the flash driver usable for things
like a read-only FFS or a geom_uzip/geom_compress .
Note that since GEOM will now return the sector size as being smaller,
writes of sector size/alignment will now fail with an EIO. Code which
writes to the flash device will have to be (for now) manually taught
about the flash write blocksize.
