Commit Graph

2438 Commits

Author SHA1 Message Date
Pyun YongHyeon
ae64408754 The number of bits reserved for MSS in RealTek controllers is
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
2008-08-04 02:05:09 +00:00
John Baldwin
a6c4b9deb4 Set all of the "optimum performance" PHY registers for the 15D parts as
well as the 15C since it seems to be required in practice.  The Linux
natsemi.c driver mostly does this as well.

PR:		kern/112179
Submitted by:	Mark Willson  mark - hydrus org uk
MFC after:	1 week
2008-07-30 17:28:49 +00:00
John Baldwin
f5698581ca SIS_SETBIT() already does a read/modify/write operation, so there isn't
a reason to read the register twice.

MFC after:	1 week
2008-07-30 17:21:32 +00:00
Pyun YongHyeon
b1d62f0fd7 Add driver support for RTL8102E and RTL8102EL which is the second
generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx
descriptor format is different from that of first generation of
RTL8101E series. Jumbo frame is not supported for RTL810x
family.

Tested by:	NAGATA Shinya ( maya AT negeta DOT com )
2008-07-09 01:58:18 +00:00
Pyun YongHyeon
715922d73f Add a new RTL8169 variant, 8169SB(L)/8110SB(L).
Reported by:	nork
Tested by:	nork
2008-07-02 08:00:14 +00:00
Pyun YongHyeon
deb5c680bb Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.
ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is
not yet supported. Because these newer controllers use different
descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to
handle that case in Tx/Rx handler. Also newer controllers seems to
require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register
so don't blindly try to set that bits.

Note, it seems that there is still power-saving related issue where
driver fails to attach PHY. Rebooting seems to fix that issue but
number of required reboots varys.

Many thanks to users that helped during developement. I really
appreciate their patient and test/feedbacks.
2008-07-02 07:54:53 +00:00
Pyun YongHyeon
351a76f9aa Instead of allocating variables for each events/hardware flags, use
a dedicated flag that represents controller capabilities/events.
This will simplify many part of code that requires different
workaround for each controller revisions and will enhance
readability.
While I'm here move PHY wakeup code up before mii_phy_probe() which
seems to help to wake PHY in some cases.
2008-07-02 06:29:43 +00:00
Pyun YongHyeon
ace7ed5dd5 Switch to memory space register mapping over IO space. If that
mapping fails fall back to traditional IO space access.
2008-07-02 05:21:09 +00:00
Oleksandr Tymoshenko
f219c59601 Add support for VT8237 ISA bridge.
PR:     kern/120714
Event:  Bugathon#5
2008-06-22 20:53:29 +00:00
Joerg Wunsch
8f1b0f8d9a Add the SMB functionality for the MCP65 chipset I happen to
have in my new motherboard.
2008-06-18 20:39:56 +00:00
Remko Lodder
8dce5c1bf6 Add another 8139D variant.
PR:		124622
Submitted by:	Evgeny Zhirnov <jirnov at gmail dot com>
Approved by:	imp (mentor, implicit)
MFC after:	3 days
2008-06-16 18:32:20 +00:00
John Baldwin
32d8ea8423 - Use bus_foo() rather than bus_space_foo() and remove bus space tag/handle
from softc.
- Mark interrupt handlers MPSAFE as these drivers have been locked for a
  while.
2008-06-06 18:29:56 +00:00
John Baldwin
88567552dd Remove unused 'xl_unit' member from softc. 2008-05-28 15:34:29 +00:00
John Baldwin
d07a0d1d4c - Set sc->dev to the new-bus device_t so all the device_printf()s work.
- Add a missing newline to a printf.

MFC after:	1 week
Submitted by:	Andriy Gapon  avg <> icyb.net.ua
2008-05-12 21:34:52 +00:00
Pyun YongHyeon
1375f576a9 It seems that RealTek 8129/8139 chip reports invalid length of
received frame under certain conditions. wpaul said the length
0xfff0 is special meaning that indicates hardware is in the
process of copying a packet into host memory. But it seems
there are other cases that hardware is busy or stuck in bad
situation even if the received frame length is not 0xfff0.
To work-around this condition, add a check that verifys that
recevied frame length is in valid range. If received length is out
of range reinitialize hardware to recover from stuck condition.

Reported by:	Mike Tancsa ( mike AT sentex DOT net )
Tested by:	Mike Tancsa
Obtained from:	OpenBSD
MFC after:	1 week
2008-04-10 01:06:05 +00:00
Pyun YongHyeon
a4148af5f0 Padding more bytes than necessary one broke another variants of
PCIe RealTek chips. Only pad IP packets if the payload is less than
28 bytes.

Obtained from:	NetBSD
PR:		kern/122221
2008-03-31 04:03:14 +00:00
Ruslan Ermilov
ea26d58729 Replaced the misleading uses of a historical artefact M_TRYWAIT with M_WAIT.
Removed dead code that assumed that M_TRYWAIT can return NULL; it's not true
since the advent of MBUMA.

Reviewed by:	arch

There are ongoing disputes as to whether we want to switch to directly using
UMA flags M_WAITOK/M_NOWAIT for mbuf(9) allocation.
2008-03-25 09:39:02 +00:00
Marius Strobl
23a6342bb7 - Take advantage of bus_dmamap_load_mbuf_sg(9).
- Take advantage of m_collapse(9).
- Sync with other NIC drivers and prepend a TX mbuf if the first attempt
  to load it fails with an error other than EFBIG and stop trying instead
  of freeing it and keeping on trying to enqueue more mbufs. Also ensure
  the driver queue isn't empty before trying to enqueue mbufs in order to
  reduce locking operations.
- In xl_ifmedia_upd() add a missing XL_UNLOCK(). [1]
- Const'ify the xl_devs array.
- Remove an outdated comment.

PR:		113406 [1]
MFC after:	1 month
2008-03-24 17:49:06 +00:00
Pyun YongHyeon
03ca7ae8a9 For MSI capable hardwares, enable MSI enable bit in RL_CFG2
register.  If MSI was disabled by hw.re.msi_disable tunable
expliclty clear the MSI enable bit.
2008-03-23 05:31:35 +00:00
Pyun YongHyeon
59cf2cdf02 vr(4) was repocopied to src/sys/dev/vr. 2008-03-11 03:53:53 +00:00
Pyun YongHyeon
dfdb409ef0 Don't map memory/IO resource in device probe and just use PCI
vendor/revision/sub device id of the hardware to probe it.
This is the same way as NetBSD does and it enhances readabilty
a lot.
2008-03-03 04:15:08 +00:00
Pyun YongHyeon
c1d0b5737f Don't allow jumbo frame on 8139C+ controller.
While I'm here add a check for minimal MTU length.
2008-03-03 03:41:06 +00:00
Pyun YongHyeon
7467bd5370 Implement WOL.
Tested by:	Fabian Keil ( freebsd-listen AT fabienkeli DOT de )
2008-03-03 03:33:58 +00:00
Poul-Henning Kamp
cf827063a9 Give MEXTADD() another argument to make both void pointers to the
free function controlable, instead of passing the KVA of the buffer
storage as the first argument.

Fix all conventional users of the API to pass the KVA of the buffer
as the first argument, to make this a no-op commit.

Likely break the only non-convetional user of the API, after informing
the relevant committer.

Update the mbuf(9) manual page, which was already out of sync on
this point.

Bump __FreeBSD_version to 800016 as there is no way to tell how
many arguments a CPP macro needs any other way.

This paves the way for giving sendfile(9) a way to wait for the
passed storage to have been accessed before returning.

This does not affect the memory layout or size of mbufs.

Parental oversight by:	sam and rwatson.

No MFC is anticipated.
2008-02-01 19:36:27 +00:00
Ruslan Ermilov
7716c3a1f9 Add copyrights.
PR:	119136
2008-01-21 13:26:33 +00:00
Pyun YongHyeon
1171c67d01 sf(4) was repocopied to src/sys/dev/sf. 2008-01-21 04:45:58 +00:00
Pyun YongHyeon
d65abd6663 Overhaul re(4).
o Increased number of Rx/Tx descriptors to 256 for 8169 GigEs
  because it's hard to push the hardware to the limit with default
  64 descriptors.
  TSO requires large number of Tx descriptors to pass a full sized
  TCP segment(65535 bytes IP packet) to hardware. Previously it
  consumed 32 Tx descriptors, assuming MCLBYTES DMA segment size,
  to send the TCP segment which means re(4) couldn't queue more
  than two full sized IP packets.
  For 8139C+ it still uses 64 Rx/Tx descriptors due to its hardware
  limitations. With this changes there are (very) small waste of
  memory for 8139C+ users but I don't think it would affect 8139C+
  users for most cases.
o Various bus_dma(9) fixes.
   - The hardware supports DAC so allow 64bit DMA operations.
   - Removed BUS_DMA_ALLOC_NOW flag.
   - Increased DMA segment size to 4096 from MCLBYTES because TSO
     consumes too many descriptors with MCLBYTES DMA segment size.
   - Tx/Rx side bus_dmamap_load_mbuf_sg(9) support. With these
     changes the code is more readable than previous one and got a
     (slightly) better performance as it doesn't need to pass/
     decode arguments to/from callback function.
   - Removed unnecessary callback function re_dmamap_desc() and
     nuked rl_dmaload_arg structure which was used in the callback.
   - Additional protection for DMA map load failure. In case of
     failure reuse current map instead of returning a bogus DMA
     map.
  -  Deferred DMA map unloading/sync operation for maximum
     performance until we really need to load new DMA map. If we
     happen to reuse current map(e.g. input error) there is no need
     to sync/unload/load again.
  -  The number of allowable Tx DMA segments for a mbuf chains are
     now 32 instead of magic nseg value. If the number of available
     Tx descriptors are short enough to send highly fragmented mbuf
     chains an optimized re_defrag() is called to collapse mbuf
     chains which is supposed to be much faster than m_defrag(9).
     re_defrag() was borrowed from ath(4).
   - Separated Rx/Tx DMA tag from a common DMA tag such that Rx DMA
     tag correctly uses DMA maps that were created with DMA alignment
     restriction(8bytes alignments). Tx DMA tag does not have such
     alignment limitation.
   - Added additional sanity checks for DMA ring map load failure.
   - Added additional spare Rx DMA map for graceful handling of Rx
     DMA map load failure.
   - Fixed misused bus_dmamap_sync(9) and added missing
     bus_dmamap_sync(9) in re_encap()/re_txeof()/re_rxeof().
o Enabled TSO again as re(4) have reasonable number of Tx
  descriptors.
o Don't touch DMA address of a Tx descriptor in re_txeof(). It's
  not needed.
o Fix incorrect update of if_ierrors counter. For Rx buffer
  shortage it should update if_qdrops as the buffer is reused.
o Added checks for unsupported H/W revisions and return ENXIO for
  these hardwares. This is required to remove resource allocation
  code in re_probe as other drivers do in device probe routine.
o Modified descriptor index manipulation macros as it's now possible
  to have different number of descriptors for Rx/Tx.
o In re_start, to save a lock operation, use IFQ_DRV_IS_EMPTY before
  trying to invoke IFQ_DRV_DEQUEUE. Also don't blindly call re_encap
  since we already know the number of available Tx descriptors in
  advance.
o Removed RL_TX_DESC_THLD which was used to reserve RL_TX_DESC_THLD
  descriptors in Tx path. There is no such a limitation mentioned in
  8139C+/8169/8110/8168/8101/8111 datasheet and it seems to work ok
  without reserving RL_TX_DESC_THLD descriptors.
o Fix a comment for RL_GTXSTART. The register is 8bits register.
o Added comments for 8169/8139C+ hardware restrictions on descriptors.
o Removed forward declaration for "struct rl_softc", it's not needed.
o Added a new structure rl_txdesc for Tx descriptor managements and
  a structure rl_rxdesc for Rx descriptor managements.
o Removed unused member variable rl_intlock in driver softc. There are
  still several unused member variables which are supposed to be used
  to access hardware statistics counters. But it seems that accessing
  hardware counters were not implemented yet.
2008-01-15 01:10:31 +00:00
Pyun YongHyeon
1acbb78ada Add another RTL8168 revision 3 which is found on RTL8111-GR Gigabit
Ethernet Controller. Multicast filtering wasn't tested and needs more
expore. While I'm here change complex if statements with switch
statement which would improve readability.

Reported by:	Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca >
Tested by:	Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca >
2007-12-08 00:14:09 +00:00
Poul-Henning Kamp
d31fc8ce59 Remove XRPU driver, after asking all the users. 2007-12-01 20:07:45 +00:00
Remko Lodder
0d985fab86 Add the FNW3603TX Planex NIC.
PR:		76081
Approved by:	imp (mentor)
Submitted by:	umi at pocke dot org
MFC After:	3 days
2007-11-26 18:25:07 +00:00
Pyun YongHyeon
6a087a8722 Fix function prototype for device_shutdown method. 2007-11-22 02:45:00 +00:00
John Baldwin
dbac8ff400 Move the agp(4) driver from sys/pci to sys/dev/agp. __FreeBSD_version was
bumped to 800004 to note the change though userland apps should not be
affected since they use <sys/agpio.h> rather than the headers in
sys/dev/agp.

Discussed with:	anholt
Repocopy by:	simon
2007-11-12 21:51:38 +00:00
Remko Lodder
b227c33921 Add SMB support for the MCP61 chipset.
PR:		108830
Submitted by:	Edwin Mons <freebsd at edwinm dot ik dot nu>
Approbed by:	imp (mentor)
2007-11-10 17:12:08 +00:00
John Baldwin
f82a1d4987 Split agp_generic_detach() up into two routines: agp_free_cdev() destroys
/dev/agpgart and agp_free_res() frees resources like the BAR for the
aperture.  Splitting this up lets chipset-specific detach routines
manipulate the aperture during their detach routines without panicing.

MFC after:	1 week
Reviewed by:	anholt
2007-10-30 22:09:16 +00:00
John Baldwin
27acd9c0f1 Oops, convert a tsleep() to a msleep() that was missed when adding locking
to this driver.

Reported by:	Michael Butler : imb of protected-networks net
2007-10-15 16:18:20 +00:00
Kevin Lo
976b010645 Spelling fix for interupt -> interrupt 2007-10-12 06:03:46 +00:00
Pyun YongHyeon
7c01ae3bd4 Not all VIA Rhine chips support 256 register space. So touching
VR_STICKHW register would result in unexpected results on these
hardwares. wpaul said the following for the issue.

  The vr_attach() routine unconditionally does this for all supported
  chips:

	/*
	 * Windows may put the chip in suspend mode when it
	 * shuts down. Be sure to kick it in the head to wake it
	 * up again.
	 */
	VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));

  The problem is, the VR_STICKHW register is not valid on all Rhine
  devices. The VT86C100A chip, which is present on the D-Link DFE-530TX
  boards, doesn't support power management, and its register space is
  only 128 bytes wide. The VR_STICKHW register offset falls outside this
  range. This may go unnoticed in most scenarios, but if you happen to have
  another PCI device in your system which is assigned the register
  space immediately after that of the Rhine, the vr(4) driver will
  incorrectly stomp it. In my case, the BIOS on my test board decided
  to put the register space for my PRO/100 ethernet board right next
  to the Rhine, and the Rhine driver ended up clobbering the IMR register
  of the PRO/100 device. (Long story short: the board kept locking up on
  boot. Took me the better part of the morning suss out why.)

  The strictly correct thing to do would be to check the PCI config space
  to make sure the device supports the power management capability and only
  write to the VR_STICKHW register if it does.

Instead of inspecting chip revision numbers for the availability of
VR_STICKHW register, check the existence of power management capability
of the hardware as wpaul suggested.

Reported by:	wpaul
Suggested by:	wpaul
OK'ed by:	jhb
2007-10-12 03:32:55 +00:00
Kevin Lo
d332abbac7 - Add the device ID for the VIA VT3324 (CX700) chipset.
- Set and Get aperture size correctly for VIA's AGP3 chipsets.

Approved by: re (kensmith)
2007-09-21 02:10:13 +00:00
Alan Cox
96e2b33657 Add the PCI id for the Intel 7221's integrated graphics controller. It is
similar to a 915G.

Approved by: re (kensmith)
Reviewed by: anholt
MFC after: 3 weeks
2007-09-15 18:16:35 +00:00
Robert Watson
0bf686c125 Remove the now-unused NET_{LOCK,UNLOCK,ASSERT}_GIANT() macros, which
previously conditionally acquired Giant based on debug.mpsafenet.  As that
has now been removed, they are no longer required.  Removing them
significantly simplifies error-handling in the socket layer, eliminated
quite a bit of unwinding of locking in error cases.

While here clean up the now unneeded opt_net.h, which previously was used
for the NET_WITH_GIANT kernel option.  Clean up some related gotos for
consistency.

Reviewed by:	bz, csjp
Tested by:	kris
Approved by:	re (kensmith)
2007-08-06 14:26:03 +00:00
Kevin Lo
0d45c918d2 Add the device ID for the VIA CX700 chipset.
Approved by: re (hrs)
2007-08-02 04:29:19 +00:00
Pyun YongHyeon
5774c5ff93 Add MSI support.
Ever since switching to adaptive polling re(4) occasionally spews
watchdog timeouts on systems with MSI capability. This change is
minimal one for supporting MSI and re(4) also needs MSIX support
for RTL8111C in future. Because softc structure of re(4) is shared
with rl(4), rl(4) was touched to use the modified softc.

Reported by:	cnst
Tested by:	cnst
Approved by:	re (kensmith)
2007-07-24 01:24:03 +00:00
Eric Anholt
d450e052dc Add support for G965/Q965/GM965/GME965/GME945 AGP.
This adds a function to agp.c to set the aperture resource ID if it's
not the usual AGP_APBASE.  Previously, agp.c had been assuming
AGP_APBASE, which resulted in incorrect agp_info, and contortions by
agp_i810.c to work around it.

This also adds functions to agp.c for default AGP_GET_APERTURE() and
AGP_SET_APERTURE(), which return the aperture resource size and disallow
aperture size changes.  Moving to these for our AGP drivers will likely
result in stability improvements.  This should fix 855-class aperture
size detection.

Additionally, refuse to attach agp_i810 when some RAM is above 4GB and
the GART can't reference memory that high.  This should be very rare.
The correct solution would be bus_dma conversion for agp, which is
beyond the scope of this change.  Other AGP drivers could likely use
this change as well.

G33/Q35/Q33 AGP support is also included, but disconnected by default
due to lack of testing.

PR:             kern/109724 (855 aperture issue)
Submitted by:   FUJIMOTO Kou<fujimoto@j.dendai.ac.jp>
Approved by:	re (hrs)
2007-07-13 16:28:12 +00:00
Pyun YongHyeon
141f92e7b5 re(4) devices requires an external EEPROM. Depending on models it
would be 93C46(1Kbit) or 93C56(2Kbit). One of differences between them
is number of address lines required to access the EEPROM. For example,
93C56 EEPROM needs 8 address lines to read/write data. If 93C56
recevied premature end of required number of serial clock(CLK) to set
OP code/address of EEPROM, the result would be unexpected behavior.
Previously it tried to detect 93C46, which requires 6 address lines,
and then assumed it would be 93C56 if read data was not expected
value. However, this approach didn't work in some models/situations
as 93C56 requries 8 address lines to access its data. In order to fix
it, change EEPROM probing order such that 93C56 is detected reliably.

While I'm here change hard-coded address line numbers with defined
constant to enhance readability.

PR:	112710
Approved by:	re (mux)
2007-07-06 00:05:12 +00:00
Scott Long
b50569b71d Prepare for future integration between CAM and newbus. xpt_bus_register
now takes a device_t to be the parent of the bus that is being created.
Most SIMs have been updated with a reasonable argument, but a few exceptions
just pass NULL for now.  This argument isn't used yet and the newbus
integration likely won't be ready until after 7.0-RELEASE.
2007-06-17 05:55:54 +00:00
Andrew Thompson
a264700b00 The mac address must be written a word length at a time, it was having no effect before.
MFC after:	1 week
2007-06-15 21:45:41 +00:00
Robert Watson
97cd541437 Where I previously removed calls to kdb_enter(), now remove include of
kdb.h.

Pointed out by:	bde
2007-05-29 11:28:28 +00:00
Robert Watson
ddc6fd3292 Implement assert() in ncr.c using KASSERT() rather than explicitly testing
the assertion and then calling kdb_enter().
2007-05-27 19:08:57 +00:00
Yaroslav Tykhiy
ac95c07889 tl(4) appears to support long frames.
Tested by:	Peter Jeremy <peterjeremy at optushome dot com dot au>
2007-05-09 09:02:11 +00:00
Poul-Henning Kamp
98b2967900 Add VLAN capability.
Submitted by:	Slawa Olhovchenkov <slw@zxy.spb.ru>
2007-04-23 12:19:02 +00:00