110535 Commits

Author SHA1 Message Date
Kevin Lo
cbb62fa6aa Follow-up r298818: hide size of 'bands' array behind a macro. 2016-05-16 02:27:28 +00:00
Rick Macklem
e6e2445622 Fix fuse for "cp" of a mode 0444 file to the file system.
When "cp" of a file with read-only (mode 0444) to a fuse mounted
file system was attempted it would fail with EACCES. This was because
fuse would attempt to open the file WRONLY and the open would fail.
This patch changes the fuse_vnop_open() to test for an extant read-write
open and use that, if it is available.
This makes the "cp" of a read-only file to the fuse mounted file system
work ok.
There are simpler ways to fix this than adding the fuse_filehandle_validrw()
function, but this function is useful for future patches related to
exporting a fuse filesystem via NFS.

MFC after:	2 weeks
2016-05-15 23:15:10 +00:00
Jared McNeill
343044c43b Add Allwinner A83T thermal sensor controller support.
The A83T thermal sensor controller has three sensors. Sensor 0 corresponds
to CPU cluster 0, sensor 1 to CPU cluster 1, and sensor 2 to the GPU. This
driver exports the temperature sensor readings via sysctl.

Calibration data is obtained from SRAM found in the Secure ID module.

Reviewed by:		manu
Differential Revision:	https://reviews.freebsd.org/D6378
2016-05-15 22:36:55 +00:00
Cy Schubert
54da23a7b3 Make subsequent code reachable.
Reported by:	Coverity CID 1354625
MFC after:	3 days
2016-05-15 22:35:11 +00:00
Don Lewis
1ef3d54d20 When handling SIOCSIFNAME ensure that the new interface name is NUL
terminated.  Reject the rename attempt if the name is too long.

MFC after:	1 week
2016-05-15 21:37:36 +00:00
Mark Johnston
565e7fd3bc opt_kdtrace.h is not needed for SDT probes as of r258541. 2016-05-15 20:04:43 +00:00
Jared McNeill
792492eee3 Enable SATA power regulator at boot on Sinovoip BananaPi BPI-M3. 2016-05-15 17:25:31 +00:00
Jared McNeill
6a94069a5e Reduce complexity of RSB by always using polling mode. Unfortunately
gpiobus methods can be called with non-sleepable locks held.

Reviewed by:	mmel
2016-05-15 16:43:47 +00:00
Jared McNeill
4e760f013d Add gpio-leds for Sinovoip BananaPi BPI-M3.
The green LED on the board is wired to AXP813 GPIO0 and the blue
LED is wired to AXP813 GPIO1.
2016-05-15 15:56:48 +00:00
Jared McNeill
fafd846c91 Add support for the AXP813/AXP818 power key and GPIO pins. 2016-05-15 15:54:41 +00:00
Jared McNeill
37cc9a031b Allow RSB to be used from interrupt handlers.
The driver uses polling mode if cold or !THREAD_CAN_SLEEP() and now
implements the bus_* interface.
2016-05-15 15:52:34 +00:00
Michal Meloun
1dd6c13536 TEGRA: Also attach gpioc to tegra_gpio driver. Forgotten in r299854. 2016-05-15 15:31:44 +00:00
Michal Meloun
7f460e50ab TEGRA: Don't use common name 'iicb' for tegra specific IIC driver.
Using commn name for different drivers breaks generic kernel creation.
2016-05-15 15:14:46 +00:00
Michal Meloun
c953c6ed19 OFWIICBUS: Make ofwiicbus_devclass externaly visible.
It's needed for binding of iic controllers.
2016-05-15 15:13:56 +00:00
Michal Meloun
d85aca8d66 TEGRA: Don't use common name 'gpio' for tegra specific GPIO driver.
Using commn name for different drivers breaks generic kernel creation.
2016-05-15 14:47:50 +00:00
Michal Meloun
e3da01a384 OFWGPIOBUS: Make ofwgpiobus_devclass externaly visible.
It's needed for binding of gpio controllers.
2016-05-15 14:43:52 +00:00
Adrian Chadd
1e383b4bca [bwn] remove N-PHY registers for now.
I've submitted an alternative proposal to -core about just importing
the (converted) GPL PHY code in an alternate directory under sys/gnu/
so I don't have to rewrite it all to be BSD licenced.
2016-05-15 14:39:41 +00:00
Emmanuel Vadot
3d8b512e0b Allow arm generic_timer code to be included even if not present in the
SoC.

Reviewed by:	andrew
Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D6372
2016-05-15 13:20:59 +00:00
Edward Tomasz Napierala
dd49c93695 Remove NULL checks after M_WAITOK allocations from isp(4).
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
2016-05-15 08:36:12 +00:00
Edward Tomasz Napierala
0d1654c39b Make it possible to reroot into NFS. This means one can have
eg an NFSv4 root over WiFi: boot from md_root (small rootfs image
preloaded by loader(8)), setup WiFi, and then reroot into the actual
root, over NFS.

Note that it's currently limited to NFSv4, and due to problems with
nfsuserd(8) it requres a workaround on the server side: one needs
to set the vfs.nfsd.enable_stringtouid=1 sysctl and not run nfsuserd(8)
on either the server or the client side.

Reviewed by:	rmacklem@
MFC after:	1 month
Relnotes:	yes
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D6347
2016-05-15 08:34:59 +00:00
Adrian Chadd
e542607041 [bwn] add DUALPHY; this may be useful for PHY-N and later dual-phy probing.
Obtained from:	Landon Fuller <landonf@landonf.org>
2016-05-15 07:02:34 +00:00
Adrian Chadd
882abba02f [bwn] commit the N-PHY register set.
Obtained from:	Linux b43 (register definitions.)
2016-05-15 06:11:40 +00:00
Mark Johnston
c81c183dae Use Node Information flag names instead of hard-coding their values.
MFC after:	1 week
2016-05-15 03:22:13 +00:00
Mark Johnston
e8800f3c2f Fix a few style issues in the ICMP sysctl descriptions.
MFC after:	1 week
2016-05-15 03:19:53 +00:00
Mark Johnston
82366c228b Add sysctl descriptions for net.inet6.ip6 and net.inet6.icmp6.
icmp6.redirtimeout, icmp6.nd6_maxnudhint and ip6.rr_prune are left
undocumented as they appear to have no effect. Some existing sysctl
descriptions were modified for consistency and style, and the
ip6.tempvltime and ip6.temppltime handlers were rewritten to be a bit
simpler and to avoid setting the sysctl value before validating it.

MFC after:	3 weeks
2016-05-15 03:18:03 +00:00
Mark Johnston
415f6c24dd Remove an always-false error check in the AIFADDR_IN6 handler.
CID:		1250792
MFC after:	1 week
2016-05-15 03:01:40 +00:00
Rick Macklem
72393e3d80 Fix fuse so that stale buffer cache data isn't read.
When I/O on a file under fuse is switched from buffered to DIRECT_IO,
it was possible to read stale (before a recent modification) data from
the buffer cache. This patch invalidates the buffer cache for the
file to fix this.

PR:		194293
MFC after:	2 weeks
2016-05-15 00:45:17 +00:00
Adrian Chadd
b327475b51 [bwn] add the full suite of SPROM flags
Obtained from:	Linux b43
2016-05-15 00:03:14 +00:00
Adrian Chadd
2ad2bda1a1 [bwn] handle core rev 12, we can mostly do that new. 2016-05-14 23:50:44 +00:00
Adrian Chadd
c3d021a603 [bwn] disable 11na channel setup for now, since we definitely, positively
don't do 11na yet.
2016-05-14 23:50:15 +00:00
Adrian Chadd
45606ae1d5 [bwn] fill out phyctl_1 fields for N-PHY (and later, eventually.)
N-PHY and later require a lot more plcp specific setup for the PHY
to know what to transmit.  I've been spoilt by the atheros, intel
and realtek parts where you don't have to hand-assemble the PLCP
but .. well, apparently Broadcom require a lot more work.

This, and PHY-N itself, was the last major missing bit to get 11a
OFDM transmit to work.  Without this, CCK transmit worked but
OFDM transmit would always fail (with stat.phy_err set to 0x80.)

I have no idea what 0x80 is, and I went mad reading the broadcom
vendor driver to try and figure it out.

Tested:

* BCM4312 (PHY-LP)
* BCM4321 (PHY-N), 11a, 11bg.
2016-05-14 23:48:26 +00:00
Adrian Chadd
80c3f55282 [bwn] set the 5ghz transmit flag for 5ghz transmit.
Turns out trying to do 11a transmit without this set works poorly.
2016-05-14 23:45:47 +00:00
Adrian Chadd
e9e6f47e20 [bwn] disable writing slottime timing out to improve performance.
this is from b43 linux, there's a comment in there which notes
one nic family suffers performance degredation with this being set.
2016-05-14 23:45:16 +00:00
Adrian Chadd
7fb49b1e66 [bwn] make rf-kill work for PHY-N. 2016-05-14 23:44:30 +00:00
Adrian Chadd
d54c38a3e9 [bwn] decode the RX RSSI for PHY-N.
I'm still figuring this out, but it at least works somewhat.
2016-05-14 23:43:43 +00:00
Adrian Chadd
6553a04cad [bwn] use the new enum type. 2016-05-14 23:43:05 +00:00
Adrian Chadd
1fb1f6f918 [bwn] debugging changes.
Now that I have 5g working on PHY-N, that "changing band" message
happens quite a bit.  Make it a debug log, not an explicit printf.
2016-05-14 23:42:37 +00:00
Adrian Chadd
53a9eeb782 [bwn] Explicitly only work for SIBA parts; add some placeholder debugging.
Set phy-full-init always to 1 for now; PHY-N supports being able to do
partial init for things like fast channel changes but I'm going to
ignore it all.
2016-05-14 23:41:28 +00:00
Adrian Chadd
cd39b27e70 [bwn] missed commit! 2016-05-14 23:38:51 +00:00
Adrian Chadd
1ea968180f [bwn] add new types, prepare for PHY-N; prepare for rev 5xx firmware.
This is a big commit with a whole lot of little changes, all in
preparation for PHY-N and rev 5xx firmware.

* add in a write method that does an explicit flush
* change the txpwr recalc type to return an enum, versus just an int.
* add in PHY-N RX frame format bits, for decoding RX RSSI and such
* add in the header space calculation for rev 5xx firmware.
* add in a whole bunch of new types that the newer and 5g phy code
  needs.  Notably, broadcom has a split 5GHz band concept -
  5G-Low, 5G(-Mid) and 5G-High.  I kept encountering this at my
  day job and wondered whether it was just some marketing thing.
  Nope, turns out it isn't; it's an actual PHY thing.

* Add a "am I a siba bus device" method, that returns true.
  The aim is to convert all the siba/bhnd specific bits in if_bwn
  over to be wrapped in this check, so when landon does a BHND
  drive through he knows which bits need updating.

Now, this the /complete/ set of changes for rev 5xx firmware.
Notably, the TX descriptor handling isn't at all done yet and the
format has changed.  So don' try blindly flipping this on just yet!
2016-05-14 23:38:21 +00:00
Jared McNeill
292e26ba55 Add pmic (AXP813) child node to r_rsb for Sinovoip BananaPi BPI-M3. 2016-05-14 23:36:00 +00:00
Konstantin Belousov
56e61f57b0 Eliminate pvh_global_lock from the amd64 pmap.
The only current purpose of the pvh lock was explained there
On Wed, Jan 09, 2013 at 11:46:13PM -0600, Alan Cox wrote:
> Let me lay out one example for you in detail.  Suppose that we have
> three processors and two of these processors are actively using the same
> pmap.  Now, one of the two processors sharing the pmap performs a
> pmap_remove().  Suppose that one of the removed mappings is to a
> physical page P.  Moreover, suppose that the other processor sharing
> that pmap has this mapping cached with write access in its TLB.  Here's
> where the trouble might begin.  As you might expect, the processor
> performing the pmap_remove() will acquire the fine-grained lock on the
> PV list for page P before destroying the mapping to page P.  Moreover,
> this processor will ensure that the vm_page's dirty field is updated
> before releasing that PV list lock.  However, the TLB shootdown for this
> mapping may not be initiated until after the PV list lock is released.
> The processor performing the pmap_remove() is not problematic, because
> the code being executed by that processor won't presume that the mapping
> is destroyed until the TLB shootdown has completed and pmap_remove() has
> returned.  However, the other processor sharing the pmap could be
> problematic.  Specifically, suppose that the third processor is
> executing the page daemon and concurrently trying to reclaim page P.
> This processor performs a pmap_remove_all() on page P in preparation for
> reclaiming the page.  At this instant, the PV list for page P may
> already be empty but our second processor still has a stale TLB entry
> mapping page P.  So, changes might still occur to the page after the
> page daemon believes that all mappings have been destroyed.  (If the PV
> entry had still existed, then the pmap lock would have ensured that the
> TLB shootdown completed before the pmap_remove_all() finished.)  Note,
> however, the page daemon will know that the page is dirty.  It can't
> possibly mistake a dirty page for a clean one.  However, without the
> current pvh global locking, I don't think anything is stopping the page
> daemon from starting the laundering process before the TLB shootdown has
> completed.
>
> I believe that a similar example could be constructed with a clean page
> P' and a stale read-only TLB entry.  In this case, the page P' could be
> "cached" in the cache/free queues and recycled before the stale TLB
> entry is flushed.

TLBs for addresses with updated PTEs are always flushed before pmap
lock is unlocked.  On the other hand, amd64 pmap code does not always
flushes TLBs before PV list locks are unlocked, if previously PTEs
were cleared and PV entries removed.

To handle the situations where a thread might notice empty PV list but
third thread still having access to the page due to TLB invalidation
not finished yet, introduce delayed invalidation.  Comparing with the
pvh_global_lock, DI does not block entered thread when
pmap_remove_all() or pmap_remove_write() (callers of
pmap_delayed_invl_wait()) are executed in parallel.  But _invl_wait()
callers are blocked until all previously noted DI blocks are leaved,
thus ensuring that neccessary TLB invalidations were performed before
returning from pmap_remove_all() or pmap_remove_write().

See comments for detailed description of the mechanism, and also for
the explanations why several pmap methods, most important
pmap_enter(), do not need DI protection.

Reviewed by:	alc, jhb (turnstile KPI usage)
Tested by:	pho (previous version)
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D5747
2016-05-14 23:35:11 +00:00
Jared McNeill
eceba010ba Add and enable Allwinner RSB and AXP81x power management IC drivers. 2016-05-14 23:34:57 +00:00
Jared McNeill
ceba82fdf5 Add a basic driver for X-Powers AXP813 and AXP818 power management ICs.
This driver simply installs a shutdown event handler for handling
RB_POWEROFF at shutdown. Tested on a Sinovoip BananaPi BPI-M3.
2016-05-14 23:33:57 +00:00
Adrian Chadd
36fcc18d80 [bwn] add an implementation of "cordic" and imaginary math.
This is used by the PHY-N code.

Obtained from:	http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic
2016-05-14 23:33:13 +00:00
Adrian Chadd
9193516e94 [bwn] TX logging / completion fixes
* Log the per-completion status out if requested
* If we get a PHY failure, the retrycnt is set to 0 and ack=0, so
  the logic was incorrect.  So, for ack=0, ensure we don't log
  a retrycnt of 0 (or rate control breaks) or a negative retrycnt
  (or rate control also breaks.)

Tested:

* BCM4321 (11abgn N-PHY), BCM4312 (LP-PHY)
2016-05-14 23:27:55 +00:00
Jared McNeill
4b9a54a9fc Add a driver for the Allwinner Reduced Serial Bus (RSB).
The RSB controller speaks a simplified two wire protocol at speeds up to
20MHz. It is used on sun8i and sun9i family SoCs to communicate with
power management ICs.

RSB isn't really I2C or SMBus, but the driver exposes an iicbus interface
to simplify power management IC drivers (which may need to support both
RSB and I2C connectivity).
2016-05-14 23:27:54 +00:00
Adrian Chadd
0cfd65ecdc [bwn] add in new microcode and phy initval information.
This is required for PHY-N and later hardware.

Tested:

* BCN4321 (11abgn), PHY-N
2016-05-14 23:23:50 +00:00
Jared McNeill
472c6f0685 Add node for A83T NMI interrupt controller. 2016-05-14 23:22:52 +00:00
Adrian Chadd
52bef765d7 [bwn] implement reset improvements in preparation for PHY-N support
* Ensure we set 20MHz wide channels (hard-coded) for PHY-N.
* Change the core rese tto take a flag saying "gmode" vesus uint32_t
  flags.  This is important for BCMA support where the "gmode" bit
  is different.
* Refactor out the mac-phy clock reset routine (usde by PHY-N).

Tested:

* BCM4321 (PHY-N), BCM4312 (PHY-LP)

TODO:

* Checkpoint test on PHY-G hardware, just to check.
2016-05-14 23:20:46 +00:00