Commit Graph

3649 Commits

Author SHA1 Message Date
Jared McNeill
013cb2e961 Add support for Allwinner A31/A31S R-GPIO (CPUs-PORT) controller.
Submitted by:		Emmanuel Vadot <manu@bidouilliste.com>
Reviewed by:		jmcneill
Differential Revision:	https://reviews.freebsd.org/D5930
2016-04-23 13:59:18 +00:00
Svatopluk Kraus
52ece7d15b Fix duplicate TLB entries issue during section promotion/demotion.
Such situation is defined as UNPREDICTABLE by arm arm manual.

This patch fixes all explicit TLB fetches which could cause this issue
and speculative TLB fetches for sections mapped in user address space.
Speculative TLB fetches for sections mapped in kernel address space are
not fixed yet as the break-before-make approach must be implemented for
kernel mappings too. This means that promoted/demoted section will be
unmapped for a while. Either kernel stack the promotion/demotion is
being done on or L1 page table(s) which must be modified may be mapped
by this section. Thus the fix will not be so simple like for userland
mappings.

The issue was detectable only on Cortex-A8 platforms and only very
rarely. It was reported few times. First, it was by Mikael Urankar
in June 2015. He helped to identify the mechanism of this issue, but
we were not sure how to fix it correctly until now.

PR:		208381
Reported by:	Mikael Urankar (mikael.urankar at gmail.com)
Reviewed by:	kib
2016-04-22 06:42:50 +00:00
Svatopluk Kraus
3d69163ace Don't use atomic operations for page table entries and handle access
and R/W emulation aborts under pmap lock.

There were two reasons for using of atomic operations:
(1) the pmap code is based on i386 one where they are used,
(2) there was an idea that access and R/W emulation aborts should be
    handled as quick as possible, without pmap locking.

However, the atomic operations in i386 pmap code are used only because
page table entries may be modified by hardware. At the beginning, we
were not sure that it's the only reason. So even if arm hardware does
not modify them, we did not risk to not use them at that time. Further,
it turns out after some testing that using of pmap lock for access and
R/W emulation aborts does not bring any extra cost and there was no
measurable difference. Thus, we have decided finally to use pmap lock
for all operations on page table entries and so, there is no reason for
atomic operations on them. This makes the code cleaner and safer.

This decision introduce a question if it's safe to use pmap lock for
access and R/W emulation aborts. Anyhow, there may happen two cases in
general:
(A) Aborts while the pmap lock is locked already - this should not
happen as pmap lock is not recursive. However, under pmap lock only
internal kernel data should be accessed and such data should be mapped
with A bit set and NM bit cleared. If double abort happens, then
a mapping of data which has caused it must be fixed.
(B) Aborts while another lock(s) is/are locked - this already can
happen. There is no difference here if it's either access or R/W
emulation abort, or if it's some other abort.

Reviewed by:	kib
2016-04-22 06:32:27 +00:00
Svatopluk Kraus
e4a93d1bb7 Add four functions which check a virtual address for stage 1 privileged
(PL1) and unprivileged (PL0) read/write access. As cp15 virtual to
physical address translation operations are used, interrupts must be
disabled to get consistent result when they are called.

These functions should be used only in very specific occasions like
during abort handling or kernel debugging. One of them is going to be
used in pmap_fault(). However, complete function set is added. It cost
nothing, as they are inlined.

While here, fix comment of #endif.

Reviewed by:	kib
2016-04-22 06:26:45 +00:00
Pedro F. Giffuni
d9c9c81c08 sys: use our roundup2/rounddown2() macros when param.h is available.
rounddown2 tends to produce longer lines than the original code
and when the code has a high indentation level it was not really
advantageous to do the replacement.

This tries to strike a balance between readability using the macros
and flexibility of having the expressions, so not everything is
converted.
2016-04-21 19:57:40 +00:00
Oleksandr Tymoshenko
658b482e0d Use proper type of tag in bcm2835_mbox_fb_init
bcm2835_mbox_fb_init sets configuration so SET_VIRTUAL_OFFSET should be used
instead of GET_VIRTUAL_OFFSET

Submitted by:	Sylvain Garrigues <sylvain@sylvaingarrigues.com>
2016-04-21 18:58:06 +00:00
Jared McNeill
473bbf691b Replace the A20 kernel config with a generic ALLWINNER kernel config that
supports A20, A31, and A31S. Adds support for the BananaPi M2 (A31S) board.

Submitted by:		Emmanuel Vadot <manu@bidouilliste.com>
Reviewed by:		jmcneill
Differential Revision:	https://reviews.freebsd.org/D5580
2016-04-21 16:49:04 +00:00
Andrew Turner
6138946f50 Make the GIC SGI global variables static, they are only ever used within
within this file.

Approved by:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-21 14:04:56 +00:00
Oleksandr Tymoshenko
65c2672f67 Force framebuffer virtual viewport to be the same as physical
VideoCore reports garbage in viewport geometry fields unless
viewport was set previously by earlier stage boot loader. So
when booting FreeBSD kernel directly from VideoCore's start.elf
framebuffer intialization fails due to invalid vxres, vyres
values. Make sure we request viewport to be equal to physical
resolution

Submitted by:	Sylvain Garrigues <sylvain@sylvaingarrigues.com>
2016-04-20 22:38:00 +00:00
Pedro F. Giffuni
33495e5daf Use our nitems() macro when param.h is available.
Replacements specific to arm, mips, pc98, powerpc and sparc64.

Discussed in:	freebsd-current
2016-04-20 15:45:55 +00:00
Oleksandr Tymoshenko
e4ad736f4d Fix build for Pi kernels with syscons enabled 2016-04-19 23:30:22 +00:00
Andrew Turner
59c3cb81c1 Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine
independent code that needs to know about INTRNG such as PCI drivers.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 16:05:41 +00:00
Pedro F. Giffuni
41b610a8ee arm: for pointers replace 0 with NULL.
These are mostly cosmetical, no functional change.

Found with devel/coccinelle.
2016-04-15 14:30:40 +00:00
Andrew Turner
2049b03cc8 Add a flag field to struct gic_irqsrc and use it to mark when we should
write to the End of Interrupt (EOI) register before handling the interrupt.
This should be a noop as it will be set for all edge triggered interrupts,
however this will not be the case for MSI interrupts. These are also edge
triggered, however we should not write to the EOI register until later in
arm_gic_pre_ithread.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 14:28:34 +00:00
Andrew Turner
e2d4ce8aef Add initial GICv2m support to the arm GIC driver. This will be used to
support MSI and MSI-X interrupts, however intrng needs updates before this
can happen.

For now we just attach the driver until the MSI API is ready.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D5950
2016-04-15 14:19:25 +00:00
Oleksandr Tymoshenko
2927e6a868 Fix UART3 and UART4 clock offsets.
Original values were copy-pasted from UART1 and UART2

PR:		197037
Submitted by:	Scott Ellis <scott@jumpnowtek.com>
2016-04-13 21:39:45 +00:00
Oleksandr Tymoshenko
2c0b1f4f61 Multiple fixes in VCHI audio driver:
- Pre-buffer audio data to VideoCore so there are no audible glitches when
    driver is too late to provide samples
- Start actual playback when there is some prebuffered audio,
    it fixes audible noisy click in the beginning of playback
- Use #defines instead of hardcoded values where appropriate
- Fix copy-pasted comment

PR:		208678
2016-04-13 05:28:27 +00:00
Pedro F. Giffuni
74b8d63dcc Cleanup unnecessary semicolons from the kernel.
Found with devel/coccinelle.
2016-04-10 23:07:00 +00:00
Jared McNeill
a09ecc1326 Enable PHY regulator when the optional "phy-supply" property is present.
Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
2016-04-09 11:23:46 +00:00
Jared McNeill
222947a742 Fix incorrect pin definitions for Allwinner A31. 2016-04-08 23:11:00 +00:00
Jared McNeill
65d6a5a446 Attach hwreset resources at the same time as clock resources. 2016-04-08 23:07:16 +00:00
Jared McNeill
ce45969226 Add function for mapping SRAM-D area to USB0 (OTG) controller. Use a lower
pass number to ensure that this driver is loaded before EMAC or OTG,
regardless of the order of nodes in the DT.
2016-04-08 10:54:59 +00:00
Jared McNeill
43b227c89f Match on compatible string "allwinner,sun4i-a10-sram-controller" instead of
"allwinner,sun4i-sramc", to match upstream DTS.
2016-04-08 00:01:19 +00:00
Ian Lepore
bcfa4e676b Remove unecessary locking, mostly from places where a read is done of a
value that can't ever be in an inconsistant intermediate state even when
some other thread is in the middle of writing the value/register.

Locking of the hardware remains in the few places that do r-m-w operations.
Locking of metadata access is restricted to places using memcpy or sprintf
to modify the metadata.
2016-04-07 19:51:27 +00:00
Ian Lepore
0dbb1fc87c Code cleanup: stop searching for a pin in the array and just use the pin
number directly as an index.  We create the array ourselves and nothing
can change the order of items in it, it's a simple 1:1 mapping.
2016-04-07 19:17:47 +00:00
Ian Lepore
be0f9b70cd Fix a copyright glitch before it gets copy-pasted again. I think this must
have started as collateral damage in a global search-replace, then it got
copied around when I cloned a file to begin creating a new file.
2016-04-07 18:19:09 +00:00
Ian Lepore
8294827ab6 Comestic changes; when INTRNG support was added, some functions became
oddly separated from related functionality.  This just moves some blocks
of code around so that setup_intr and teardown_intr are near each other
again, and likewise for enable/disable_intr.  No functional changes.
2016-04-07 17:45:01 +00:00
Svatopluk Kraus
f46a487807 Properly initialize isrc_cpu field of ISRC which is setup for an IPI. 2016-04-07 15:26:12 +00:00
Svatopluk Kraus
5b613c19b5 Implement intr_isrc_init_on_cpu() and use it to replace very same
code implemented in every interrupt controller driver running SMP.
This function returns true, if provided ISRC should be enabled on
given cpu.
2016-04-07 15:00:25 +00:00
Jared McNeill
6a05f063ed Convert Allwinner port to extres clk/hwreset/regulator APIs.
Reviewed by:		andrew, gonzo, Emmanuel Vadot <manu@bidouilliste.com>
Approved by:		gonzo (mentor)
Differential Revision:	https://reviews.freebsd.org/D5752
2016-04-06 23:11:03 +00:00
Svatopluk Kraus
3d6bafd11a Fix typo. No functional change. 2016-04-05 13:56:43 +00:00
Svatopluk Kraus
89de2fb6d4 Rework BCM283x gpio interrupt controller for INTRNG. It's used on RPI-B
and RPI2 where INTRNG is already enabled by default.

Differential Revision:	https://reviews.freebsd.org/D5810
2016-04-05 13:45:23 +00:00
Svatopluk Kraus
120b6fc9b2 Implement bcm2836 interrupt controller for INTRNG and enable it
on RPI2 by default.

Differential Revision:	https://reviews.freebsd.org/D5822
2016-04-05 13:41:51 +00:00
Svatopluk Kraus
472f2cca82 Rework bcm283x interrupt controller for INTRNG and enable it
on RPI-B by default.

Reviewed by:	gonzo
Differential Revision:	https://reviews.freebsd.org/D5809
2016-04-05 13:37:03 +00:00
Michal Meloun
c520cb4f50 ehci_interrupt is MPSAFE code. Most drivers in tree calls bus_setup_intr
with MPSAFE, some are not. Fix those.

Submitted by: Howard Su <howard0su@gmail.com>
Differential Revision: https://reviews.freebsd.org/D5755
2016-04-05 12:13:53 +00:00
Michal Meloun
b799783990 TEGRA: Fix CPU frequency switching.
The PLL_X, base CPU frequency source, doesn't have a bypass switch and thus
we must use another frequency source for CPU while changing its frequency.
PLL_P is ideal for this, it runs at 480MHz and CPU can be clocked at this
frequency at any CPU voltage.
2016-04-05 09:20:52 +00:00
Andrew Turner
53b832b091 Add a table to map from the FreeBSD CPUID space to the GIC CPUID space. On
many SoCs these two are the same, however there is no requirement for this
to be the case, e.g. on the ARM Juno we boot on what the GIC thinks of as
CPU 2, but FreeBSD numbers it CPU 0.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-04 17:04:33 +00:00
Svatopluk Kraus
fa64321bba Define local-intc for BCM2836 platform (RPI2) and make BCM2835 intc
a child of it. This is done in conformity with Linux dts files and
as preparation for rework of BCM2836 interrupt controller for INTRNG.

Reviewed by:	gonzo
Differential Revision:	https://reviews.freebsd.org/D5807
2016-04-04 09:41:22 +00:00
Svatopluk Kraus
2df5562d0c Rework TI gpio interrupt controller for INTRNG. It's used on PANDABOARD
and BEAGLEBONE where INTRNG is already enabled by default.

Reviewed by:	gonzo
Differential Revision:	https://reviews.freebsd.org/D5806
2016-04-04 09:29:30 +00:00
Svatopluk Kraus
86816217ff Rework am33xx interrupt controller for INTRNG and enable it
on BEAGLEBONE by default.

Reviewed by:	gonzo
Differential Revision:	https://reviews.freebsd.org/D5805
2016-04-04 09:23:21 +00:00
Svatopluk Kraus
bff6be3e9b Remove FDT specific parts from INTRNG. Change its interface to make it
universal.

(1) New struct intr_map_data is defined as a container for arbitrary
description of an interrupt used by a device. Typically, an interrupt
number and configuration relevant to an interrupt controller is encoded
in such description. However, any additional information may be encoded
too like a set of cpus on which an interrupt should be enabled or vendor
specific data needed for setup of an interrupt in controller. The struct
intr_map_data itself is meant to be opaque for INTRNG.

(2) An intr_map_irq() function is created which takes an interrupt
controller identification and struct intr_map_data as arguments and
returns global interrupt number which identifies an interrupt.

(3) A set of functions to be used by bus drivers is created as well as
a corresponding set of methods for interrupt controller drivers. These
sets take both struct resource and struct intr_map_data as one of the
arguments. There is a goal to keep struct intr_map_data in struct
resource, however, this way a final solution is not limited to that.

(4) Other small changes are done to reflect new situation.

This is only first step aiming to create stable interface for interrupt
controller drivers. Thus, some temporary solution is taken. Interrupt
descriptions for devices are stored in INTRNG and two specific mapping
function are created to be temporary used by bus drivers. That's why
the struct intr_map_data is not opaque for INTRNG now. This temporary
solution will be replaced by final one in next step.

Differential Revision:	https://reviews.freebsd.org/D5730
2016-04-04 09:15:25 +00:00
Jared McNeill
bfba653b0e Improve HDMI display detection by searching the CEA-861 extension block for
an HDMI vendor-specific data block (VSDB) containing the HDMI 24-bit IEEE
registration ID (0x000C03).

Approved by:	gonzo (mentor)
2016-04-02 16:53:12 +00:00
Jared McNeill
b738dafd90 Move support for Synopsys Designware APB UART out of ns8250 and into a
separate driver. Add support for activating clock and hwreset resources
for these devices when the EXT_RESOURCES option is present.

Reviewed by:		andrew, mmel, Emmanuel Vadot <manu@bidouilliste.com>
Approved by:		adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D5749
2016-04-01 20:26:45 +00:00
Luiz Otavio O Souza
191004d586 Enable SPI1 on Beaglebone Black.
SPI1 was chosen because SPI0 shares the gpio pins with I2C1.

Sponsored by:	Rubicon Communications (Netgate)
2016-03-30 17:32:14 +00:00
Luiz Otavio O Souza
e5185f3e2f Bump up the read and write timeouts. The old value was too small for low
speed transfers.

Sponsored by:	Rubicon Communications (Netgate)
2016-03-30 16:26:00 +00:00
Luiz Otavio O Souza
cb18f3f308 Add the SPI driver for am335x.
This driver works in PIO mode for now, interrupts are available only when
FIFO is enabled.  The FIFO cannot be used with arbitrary sizes which defeat
its general use.

At some point we can add DMA transfers where the FIFO can be more useful.

Tested on uBMC (microBMC) and BBB.

Sponsored by:	Rubicon Communications (Netgate)
2016-03-29 19:11:04 +00:00
Andrew Turner
6c5b1ed4b6 Read the CPU ID for the current CPU from the GIC. The GIC may have a
different ID space than the kernel. Because of this we need to read the
ID from the hardware. The hardware will provide this value to the CPU by
reading any of the first 8 Interrupt Processor Targets Registers.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D5706
2016-03-29 13:51:26 +00:00
Andrew Turner
bdb976c4a3 Only define the platform methods for the Allwinner platforms we are
building for.

Sponsored by:	ABT Systems Ltd
2016-03-26 17:49:46 +00:00
Michal Meloun
8cc018c369 ARM: Fix bug introduced in r297286.
- don't put command line without guard to kernel environment.
 - kernel environment delivered from ubldr must have absolute precedence.
2016-03-26 12:19:27 +00:00
Michal Meloun
58872fc01a TEGRA: Fixes for UART driver:
- add mising 'or' in tegra_uart_attach()
   Pointed by: kan
 - fix indentation of tegra_softc
 - remove forgoten debug printf
2016-03-26 10:09:28 +00:00