- Fix some whitespace nits.
- Fix some spelling in comments.
- Use MII_ANEGTICKS instead of 5.
- Don't define variables in nested scope.
- Remove superfluous returns at the end of void functions.
- Remove unused static global rgephy_mii_model.
- Remove dupe $Id$ in tdkphy(4).
- Sort brgphys table.
MFC after: 2 weeks
mii_phy_match() API and takes care of the PHY device probe based on
the struct mii_phydesc array and the match return value provided.
Convert PHY drivers to take advantage of mii_phy_dev_probe(),
converting drivers to provide a mii_phydesc table in the first
place where necessary.
Reviewed by: yongari
MFC after: 2 weeks
the falling edge of a media state change.
This is in preparation for media state change notification to the
routing socket.
No objections by: sam, wpaul, ru, bms
Brucification by: bde
Rename mii_phy_auto_stop() mii_phy_down().
Introduce mii_down(), use it from nge. Do not indirect it to 19 identical
case's in 19 switchstatements like NetBSD did.
. Make internal service routines static.
. Use a consistent ordering of checks in MII_TICK. Do the work in the
mii_phy_tick() subroutine if appropriate.
. Call mii_phy_update() to trigger the callbacks.
the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1
PHY comes up with the isolate bit in the control register set by default,
but it also has the autonegotiate bit set. When you tell the xmphy driver
to select IFM_AUTO mode, it sees that the autoneg bit is already on, and
thus doesn't bother updating the control register. However this means that
the isolate bit is never turned off (unless you manually select 1000baseSX
full or half duplex mode, which does result in the control register being
modified and the ISO bit being turned off).
This subtle and unusual behavioral difference stopped me from being able
to receive packets on the SMC9462TX card for several days, since isolating
the PHY disconnects it from the MAC's data interface. The fix is to omit
the 'is the autoneg big set?' test, since it doesn't really provide much
of an optimization anyway.
This commit also updates the xmphy driver to support the Jato/Level 1
internal PHY. (I'm not sure how Jato Technologies is related to Level 1:
all I know is the OUI from the PHY ID registers maps to Jato in the OUI
database.) This will be used once I add the if_lge driver to support
the LXT10010 chip.
