o Only complain about detached children that aren't pccard/cardbus.
o Don't NULL out the pccarddev and cbdev devices. detach just
disassociates the device and driver. It doesn't delete the child.
o on driver added, just probe_and_attach the children. If there's
any children attached, wakeup the device add/delete thread.
o wakeup the add/delete thread with the correct cv_signal() rather
than the bogus wakeup(sc). It used to be that we did a tsleep on
sc in this thread, but switched to the more reliable cv stuff a while
ago w/o changing this.
o Remove bogus checks when reallocating memory for the registers. They
weren't needed and turned out to be completely bogus.
This lets me load/unload pccard with a pccard in a slot and have the
child correctly detach/attach. This should help people that have wi
in their kernel, but that kldload cbb and pccard, for example.
we can have additional different types of bridges.
o remove now bogus comment.
o Don't clear CARD_OK when we can't attach a card.
o minor style nits
# this make kldload of cardbus drivers work for me when the card is
# present on boot.
o Always release the resources on device detach.
o Attach resources the same with driver added as we do we do in the insert
case (maybe this should be a routine).
o signal the wakeup of the thread on resume instead of trying to force an
interrupt.
o Minor debug hacks.
o use 0xffffffff instead of -1 for uint32_t items.
o Don't complain when we're asked to detach no cards. This is normal.
o Eliminate the now worthless second parameter to card_detach_card.
o minor style(9)isms
Some of these patches may be from: iwasaki-san, jhb, iadowse
clear the bit. This allows ata driver to attach its children because
it needs the interrupts enabled to succeed.
Submitted by: iwasaki-san
o Spell CardBus as CardBus, not Cardbus or CardBUS while I'm here.
o Implement the thread killing interlock as described by jhb in arch@
while talking to markm.
o Hold Giant around cbb_insert()/cbb_remove(). Deep in the belly of
the vm code we panic if we don't hold this when we activate the memory
for reading the CIS.
o If we had to do the kludge alloc, then do a kludge free.
o Better resume code. Move the comments around. Force the socket state to
be querried. Ack the interrupts properly.
o Intercept the interrupt requests and keep a list of interrupts to service
ourselves. When the card attaches, set its OK bit. When we get a card
status change interrupt for that card, clear the OK bit. Don't call the
ISR if the OK bit is cleared. Iwasaki-san and yamamoto-san have both
sent me patches that fix the same problem this fixes, but at the pccard
level.
o Try to get the signalling of the thread to actually die. This might not be
100% right, but it is less wrong than before.
o Add a SIC next to a TI type that looks like it could be wrong, but isn't.
doesn't give them enough stack to do much before blowing away the pcb.
This adds MI and MD code to allow the allocation of an alternate kstack
who's size can be speficied when calling kthread_create. Passing the
value 0 prevents the alternate kstack from being created. Note that the
ia64 MD code is missing for now, and PowerPC was only partially written
due to the pmap.c being incomplete there.
Though this patch does not modify anything to make use of the alternate
kstack, acpi and usb are good candidates.
Reviewed by: jake, peter, jhb
code to do it when the bios doesn't do it for us, flag it. Then, when
we dealloc, do an equal kludge to get rid of the address. This should
address the can't get IRQ and panic bug in a more graceful way.
# really should write a dealloc routine and just call it instead, since
# this might not fix things in the kldunload case.
o Rename the insanely long PCIC bridge ids.
o Add my copyright to pccbb.c
o Add support for the TI-1510, TI-1520 and TI-4510 series of upcoming
bridges.
o Init MFUNC if it is zero and the TI part has a MFUNC register
at offset 0x8c (1030, 1130 and 1131 don't have anything there, the
1250,1251,1251B and 1450 have a different thing there. The rest
have it. TI is likely to only do MFUNC from now on. The IRQMUX
in the 1250 series of chips needs no tweaks.
o Adjust to new exca interface.
o Add comments about TI chips that I learned in talking to an
engineer at TI.
o Add register definitions for MFUNC.
o Create CB_TI125X chipset type.
handshake between the ISR and the worker thread. Move the mutex lock
so that it only protects the cv_wait. This elimiates the not sleeping
with pccbb1 held messages some people were seeing.
Reviewed by: jhb (at least an early version)
most cases NULL is passed, but in some cases such as network driver locks
(which use the MTX_NETWORK_LOCK macro) and UMA zone locks, a name is used.
Tested on: i386, alpha, sparc64
Appologies for making this one bulk commit, but I have tested all these
changes together and don't want to break anything by trying to disentangle
it.
o Make debugging a sysctl/tunable
o Remove flags word from yenta chip info, it is unused
o Make 16-bit card I/O range and 32-bit card I/O range tunables
o Start the rename of pccbb to cbb to match NetBSD by misc renames.
o Kill the now bogus list of softcs to create kthread. Instead, just
create the kthread in the attach routine.
o Remove sc_ from some structure names. It isn't needed.
o Refine chipset lookup code.
o Match generic PCI <-> CardBus bridges. We specifically don't generically
match PCI PCMCIA bridges because they are not, with one exception, yenta
devices.
o Add some comments about the why we need to have a function table ala
OLDCARD
o The PCI interrupt routing by using the ExCA registers is needed for
for all bridges, per the spec, not just TI ones.
o Collapse TOPIC95 and TOPIC95B.
o Using the ToPIC 97 and 100 datasheets, try to support these bridges better,
but more work is needed.
o Generally clarify some XXX comments and add them in a few places where
things didn't look right to me.
o Move interrupt generating register access until after we establish an ISR.
o Add support for YV and XV cards. X and Y are numbers to be determined
later (but maybe never).
o factor powerup code for 16-bit and 32-bit cards.
o When a card supports more than one voltage, prefer the lowest supported
volage. Windows does this, and MS's design guides imply this is the
right thing to do.
o Document race between kthread_exit(0) and kldunload's unmapping of pages
that John Baldwin and I discovered.
o Debounce the CSC interrupt a little better.
o When a 16-bit card is inserted when we don't have a pccard child,
warn about it better. Ditto for 32-bit card.
o Ack ALL the interrupt bits that we get, not just 0x1.
o maybe a couple minor style nits corrected.
o Don't allow INTR_TYPE_FAST. Since we are sharing the interrupt between
CSC and the functions, they can't be FAST because fast interrupts can't
be shared.
o Add the same workaround for resume that we have in OLDCARD.
o Also, return the error from bus_generic_resume rather than ignoring it.
o Remove bogus flags that aren't used (if we need them in the future, we can
add them back).
o Add support for the TI-1031. This is the only YENTA compatible PCI-PCMCIA
bridge that I'm aware of (all the others are PCIC on a PCI bus, which is
different).
loader parameter. This allows us to more easily boot on big memory
configuration machines. hw.pccbb.start_mem. Reflect this in a sysctl
so we can read it from userland.
# Note: we need a TUNABLE_ULONG to do this right. I'll add that to
# kernel.h soon.
changing. Also change it from 0x44000000 to 0x84000000 for large memory
machines.
# the PCI bus code should do this for us. This is a bandaide, not a
# solution.
off chip that was on one prototype board. However, this appears to be
a design that many chipsets are compatible with its PPEC register set
(eg the Omega 82c094). Through the kindness of the Red Hat developer
David Woodhouse, I now have this datasheet.
I may take the advise of one of the bsd-nomads (whose name
unfortunately escapes me at the moment) and split out all these 16-bit
I/O mapped PCI devices into a separate driver...
that it has one BAR that's mapped to 0x3e0 and is I/O only. It does
not conform to the Yenta spec, like other PCI PCMICA bridges do (eg
the TI 1031, which is mostly a 1131 w/o 32bit card support). It
appears that this chip may also need to not route PCI interrupts
as well.
This chip is used in the NEC Versa 2430CD (and it appears that
sometimes it works, while other times it doesn't) and others in the
2400 series. While the NEC website claims Cardbus support, I can't figure
out how that is possible.
Submitted by: Ben Timby <ben@webexc.com>
