Commit Graph

154374 Commits

Author SHA1 Message Date
Neel Natu
293f20dffb Make sure that the registers 'v0' and 'v1' are properly sign-extended
when sb_load64() returns.

Some 32-bit arithmetic operations (e.g. subu) have unpredicatable results
when operating on 64-bit registers that are not properly sign-extended.
2010-03-20 05:21:14 +00:00
Neel Natu
cf4459fb01 Get rid of unused macro MIPS_MEM_RID.
Suggested by: Alexandr Rybalko (ray@dlink.ua)
2010-03-20 05:10:44 +00:00
Neel Natu
de88808f0a This change enables use of physical memory that is beyond the direct
mapped kseg0 region.

The basic idea is to use KVA from the kseg2 region for mapping page
table pages that lie beyond the direct mapped region.

The TLB miss handler can now recursively fault into the TLB invalid
handler if it dereferences a kseg2 page table page address that is not
in the TLB.

Tested by: JC (c.jayachandran@gmail.com)
2010-03-20 05:07:15 +00:00
Alexander Motin
f81100fd11 Enable MSI by default for SiI3124. 2010-03-20 04:40:15 +00:00
Marcel Moolenaar
a5cef7a1ce Don't check for boot_verbose in the environment. The loader does
that already and sets RB_VERBOSE. The loader has always done it.
2010-03-20 04:22:22 +00:00
Nathan Whitehorn
d2f1e0e4a5 Let unin(4) attach to U3 controllers found on G5 machines.
Submitted by:	Andreas Tobler
2010-03-20 03:58:00 +00:00
Warner Losh
30e980f2d1 Add support for the Samsung S3C2xx0 family of ARM SoCs written by
Andrew Turner.  The kernel supports the LN2410SBC evaluation board,
and likely others.  These parts (or similar ones) are in some open
hardware designs for phones.

Submitted by:	Andrew Turner
2010-03-20 03:39:35 +00:00
Jung-uk Kim
ef8201d39d - Map EBDA if available and add 64KB above 1MB (high memory), just in case.
- Print the initial memory map when bootverbose is set.
- Change the page fault address format from linear to %cs:%ip style.
- Move duplicate code into a newly added function.
- Add strictly aligned memory access for distant future. ;-)
2010-03-19 21:15:43 +00:00
Pawel Jakub Dawidek
58804a192e The same code is used to import and to create pool.
The order of operations is the following:
1. Try to open vdev by remembered path and guid.
2. If 1 failed, try to find vdev which guid matches and ignore the path.
3. If 2 failed this means either that the vdev we're looking for is gone
   or that pool is being created and vdev doesn't contain proper guid yet.
   To be able to handle pool creation we open vdev by path anyway.

Because of 3 it is possible that we open wrong vdev on import which can lead to
confusions.

The solution for this is to check spa_load_state. On pool creation it will be
equal to SPA_LOAD_NONE and we can open vdev only by path immediately and if it
is not equal to SPA_LOAD_NONE we first open by path+guid and when that fails,
we open by guid. We no longer open wrong vdev on import.

MFC after:	2 weeks
2010-03-19 20:14:27 +00:00
Bjoern A. Zeeb
42eedeac00 Split eventhandler_register() into an internal part and a wrapper function
that provides the allocated and setup eventhandler entry.

Add a new wrapper for VIMAGE that allocates extra space to hold the
callback function and argument in addition to an extra wrapper function.
While the wrapper function goes as normal callback function the
argument points to the extra space allocated holding the original func
and arg that the wrapper function can then call.

Provide an iterator function for the virtual network stack (vnet) that
will call the callback function for each network stack.

Provide a new set of macros for VNET that in the non-VIMAGE case will
just call eventhandler_register() while in the VIMAGE case it will use
vimage_eventhandler_register() passing in the extra iterator function
but will only register once rather than per-vnet.
We need a special macro in case we are interested in the tag returned
as we must check for curvnet and can neither simply assign the
return value, nor not change it in the non-vnet0 case without that.

Sponsored by:	ISPsystem
Discussed with:	jhb
Reviewed by:	zec (earlier version), jhb
MFC after:	1 month
2010-03-19 19:51:03 +00:00
Xin LI
0d0284bc52 Back out revision 205307.
For the record:

CPU_ENABLE_SSE enables some code that dynamically enables SSE support
but not necessarily enforce execution of SSE instructions.
2010-03-19 16:09:57 +00:00
Ed Schouten
799c1824b1 Slightly improve my previous commit.
Just comment out the atrun line instead of completely removing it. It is
not a bad idea to leave it as a reference in case someone decides to
install atrun by hand afterwards.
2010-03-19 15:53:02 +00:00
Andriy Gapon
9344361b66 pmap amd64/i386: fix a typo in a comment
MFC after:	3 days
2010-03-19 14:48:32 +00:00
Andriy Gapon
212909cc32 vfs_mount.9: drop cross-reference to a removed manual
MFC after:	3 days
2010-03-19 14:35:38 +00:00
John Baldwin
42c93b8d31 Use the same policy for rejecting / not-reject ACPI tables with incorrect
checksums as the base acpi(4) driver.  This fixes a problem where the MADT
parser would reject the MADT table during early boot causing the MP Table
to be, but then the acpi(4) driver would attach and use non-SMP interrupt
routing.

Tested by:	Alastair Hogge  agh of coolrhaug com
MFC after:	1 week
2010-03-19 12:43:18 +00:00
Ed Schouten
5743a283c2 Don't add the atrun-line to the crontab when MK_AT is set.
This prevents spurious calls to sendmail every 5 minutes.

MFC after:	1 week
2010-03-19 11:59:02 +00:00
Konstantin Belousov
28ad01d2ba Regen 2010-03-19 11:14:37 +00:00
Konstantin Belousov
f7ae46da1f Remove empty line.
MFC after:	2 weeks
2010-03-19 11:13:42 +00:00
Konstantin Belousov
723d37c0ac Convert aio syscall registration to SYSCALL_INIT_HELPER.
Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 11:11:34 +00:00
Konstantin Belousov
afde2b6593 Implement compat32 shims for mqueuefs.
Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 11:10:24 +00:00
Konstantin Belousov
0e5d5bc279 Implement compat32 shims for ksem syscalls.
Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 11:08:43 +00:00
Konstantin Belousov
75d633cbf6 Move SysV IPC freebsd32 compat shims from freebsd32_misc.c to corresponding
sysv_{msg,sem,shm}.c files.

Mark SysV IPC freebsd32 syscalls as NOSTD and add required
SYSCALL_INIT_HELPER/SYSCALL32_INIT_HELPERs to provide auto
register/unregister on module load.

This makes COMPAT_FREEBSD32 functional with SysV IPC compiled and loaded
as modules.

Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 11:04:42 +00:00
Konstantin Belousov
4cfc39cfa6 Move SysV IPC freebsd32 compat shims helpers from freebsd32_misc.c to
sysv_ipc.c.

Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 11:01:51 +00:00
Konstantin Belousov
0687ba3e90 Introduce SYSCALL_INIT_HELPER and SYSCALL32_INIT_HELPER macros and
neccessary support functions to allow registering dynamically loaded
syscalls from the MOD_LOAD handlers. Helpers handle registration
failures semi-automatically.

Reviewed by:	jhb
MFC after:	2 weeks
2010-03-19 10:56:30 +00:00
Konstantin Belousov
99b331a982 FOr SYSCALL_MODULE_HELPER, use "sys/<syscallname>" module name.
FOr SYSCALL32_MODULE_HELPER, use "sys32/<syscallname>" module name.
This avoids modules name conflict when compat32 syscall does not
need shims.

Note that SYSCALL_MODULE_HELPER is going to be unused in the tree by
several next commits.

Suggested by:	jhb
MFC after:	2 weeks
2010-03-19 10:52:54 +00:00
Konstantin Belousov
c5e4763dd3 Make freebsd32_copyiniov() available outside of freebsd32_misc.
MFC after:	2 weeks
2010-03-19 10:49:03 +00:00
Konstantin Belousov
5322f02ec0 Properly handle compat32 calls to sctp generic sendmsd/recvmsg functions that
take iov.

Reviewed by:	tuexen
MFC after:	2 weeks
2010-03-19 10:46:54 +00:00
Konstantin Belousov
fd9d1e7627 Remove dead statement.
Reviewed by:	tuexen
MFC after:	2 weeks
2010-03-19 10:44:02 +00:00
Konstantin Belousov
0a977ede48 Fix two style issues.
MFC after:	2 weeks
2010-03-19 10:41:32 +00:00
Shteryana Shopova
9315567023 Make sure the snmp_pf module will first refresh its entires if necessary,
then find a specific entry, and get the requested value. So far, it found
the specific entry, refreshed the entry list if necessary, and got the
requested value from the found entry. The problem is that refreshing nukes
all old entries and replaces them with new ones and the obtained entry
pointer was no longer valid after the refresh.

Reviewed by:		bz, philip
MFC after:		1 week
2010-03-19 09:53:25 +00:00
Warner Losh
ae84e39b61 Fix typo in comment 2010-03-19 05:40:47 +00:00
Xin LI
01af4cc1cc SSE is enabled by default about 5 years ago so there is no point pretending
that we support I486 and I586 CPUs in the GENERIC kernel, users wants these
support would have to build a custom kernel to explicitly disable SSE
anyways.

MFC after:	1 month
2010-03-19 01:16:53 +00:00
David Christensen
c8331f5c12 - Added support for 5709S/5716S PHYs.
- Update copyright to 2010.
- Add new debug code for RV2P block.
- Improve output formatting for various debug functions.

MFC after:	2 weeks
2010-03-18 21:00:53 +00:00
David Christensen
b249ff39a4 - Added support for 5709S/5716S PHYs.
Submitted by:	pyunyh
MFC after:	2 weeks
2010-03-18 20:57:57 +00:00
Kip Macy
6b4391d786 turn 205266 in to a no-op until the problem can be properly diagnosed 2010-03-18 20:30:25 +00:00
Jung-uk Kim
b92184ec0a Detect illegal access to unmapped memory within real mode emulator to aid
debugging.  Update copyright date while I am here.
2010-03-18 20:15:34 +00:00
Ed Schouten
f97f9525ba Properly progress through the list of IPv6 addresses using in6_addr size.
Right now if a jail has multiple IPv6 addresses, it will print them
shifting only 4 bytes at a time. Example:

	2001:4dd0:ff41::b23f:a9
	2001:4dd0:ff41::b23f:aa

Becomes:

	2001:4dd0:ff41::b23f:a9
	ff41::b23f:a9:2001:4dd0

By casting to in6_addr, it uses the correct offsets.

MFC after:	1 week
2010-03-18 20:13:04 +00:00
Doug Barton
b8743b3ba5 Update to 9.6.2-P1, the latest patchfix release which deals with
the problems related to the handling of broken DNSSEC trust chains.

This fix is only relevant for those who have DNSSEC validation
enabled and configure trust anchors from third parties, either
manually, or through a system like DLV.
2010-03-18 19:00:35 +00:00
Doug Barton
3453d74641 For those of us mere mortals who do not aspire to the lofty heights
of kernel hackery, add MAKE_JUST_WORLDS so that we can take part in
the 'make universe' goodnes without using unecessary time and resources.
2010-03-18 18:58:17 +00:00
Rui Paulo
fec0a521a7 Unbreak build by removing a code bit that is only related to other code
in my branch.
2010-03-18 15:28:17 +00:00
Shteryana Shopova
72d420c708 Add support for retrieving labeled pf filter rule counters.
PR:		bin/132847
Submitted by:	Szalai Andras <szalai (dot) bandi (at) gmail.com>
2010-03-18 14:54:31 +00:00
Pawel Jakub Dawidek
b0990a1dae Simplify loops. 2010-03-18 13:11:43 +00:00
Rui Paulo
0917631f16 Fix a couple of bugs with 802.11n:
o Process the BAR frame on the adhoc, mesh and sta modes
o Fix the format of the ADDBA reply frame
o Fix references to the spec section numbers

Also, print the all the MCS rates in bootverbose.

Sponsored by:	iXsystems, Inc.
Obtained from:	//depot/user/rpaulo/80211n/...
2010-03-18 11:06:38 +00:00
Bjoern A. Zeeb
335b943f8e Add ddb support to the "new" link layer code ("new-arp"):
- show all lltables [1] (optional flag to also show the llentries as well)
 - show lltable <struct lltable *>
 - show llentry <struct llentry *>

MFC after:	6 days
2010-03-18 09:09:59 +00:00
Ed Schouten
ee48488f0b Remove an unneeded variable.
Reported by:	tinderbox
2010-03-18 07:35:20 +00:00
Xin LI
f379d0f7f5 Remove two pieces of code (one disabled in revision 39665 and another derived
from the first one) that is not used for the last 12 years.
2010-03-18 00:27:17 +00:00
Qing Li
78f3ac9cdb Need to set the proper flag bit when inserting ARP
entries into the kernel.

MFC after:	3 days
2010-03-18 00:23:39 +00:00
Juli Mallett
41ded75de8 o) Add a keyword to displaying elapsed time in integer seconds, "etimes".
o) Give slightly better (i.e. any) documentation of the format of "etime".

Reviewed by:	jilles
2010-03-17 22:57:58 +00:00
Warner Losh
c0df07cad9 Remove two instances of the evil hack to get the ifnet. mii_ifp is
set early enough that we don't need to do these hacks anymore.
2010-03-17 22:45:53 +00:00
Marius Strobl
ddcc3ff59e o Add support for UltraSparc-IV+:
- Swap the configuration of the first and second large dTLB as with
    US-IV+ these can only hold entries of certain page sizes each, which
    we happened to chose the non-working way around.
  - Additionally ensure that the large iTLB is set up to hold 8k pages
    (currently this happens to be a NOP though).
  - Add a workaround for US-IV+ erratum #2.
  - Turn off dTLB parity error reporting as otherwise we get seemingly
    false positives when copying in the user window by simulating a
    fill trap on return to usermode. Given that these parity errors can
    be avoided by disabling multi issue mode and the problem could be
    reproduced with a second machine this appears to be a silicon bug of
    some sort.
  - Add a membar #Sync also before the stores to ASI_DCACHE_TAG. While
    at it, turn of interrupts across the whole cheetah_cache_flush() for
    simplicity instead of around every flush. This should have next to no
    impact as for cheetah-class machines we typically only need to flush
    the caches a few times during boot when recovering from peeking/poking
    non-existent PCI devices, if at all.
  - Just use KERNBASE for FLUSH as we also do elsewhere as the US-IV+
    documentation doesn't seem to mention that these CPUs also ignore the
    address like previous cheetah-class CPUs do. Again the code changing
    LSU_IC is executed seldom enough that the negligible optimization of
    using %g0 instead should have no real impact.

  With these changes FreeBSD runs stable on V890 equipped with US-IV+
  and -j128 buildworlds in a loop for days are no problem. Unfortunately,
  the performance isn't were it should be as a buildworld on a 4x1.5GHz
  US-IV+ V890 takes nearly 3h while on a V440 with (theoretically) less
  powerfull 4x1.5GHz US-IIIi it takes just over 1h. It's unclear whether
  this is related to the supposed silicon bug mentioned above or due to
  another issue. The documentation (which contains a sever bug in the
  description of the bits added to the context registers though) at least
  doesn't mention any requirements for changes in the CPU handling besides
  those implemented and the cache as well as the TLB configurations and
  handling look fine.
o Re-arrange cheetah_init() so it's easier to add support for SPARC64
  V up to VIIIfx CPUs, which only require parts of this initialization.
2010-03-17 22:45:09 +00:00