118275 Commits

Author SHA1 Message Date
Conrad Meyer
ea5eee641e Fix information leak in geli(8) integrity mode
In integrity mode, a larger logical sector (e.g., 4096 bytes) spans several
physical sectors (e.g., 512 bytes) on the backing device.  Due to hash
overhead, a 4096 byte logical sector takes 8.5625 512-byte physical sectors.
This means that only 288 bytes (256 data + 32 hash) of the last 512 byte
sector are used.

The memory allocation used to store the encrypted data to be written to the
physical sectors comes from malloc(9) and does not use M_ZERO.

Previously, nothing initialized the final physical sector backing each
logical sector, aside from the hash + encrypted data portion.  So 224 bytes
of kernel heap memory was leaked to every block :-(.

This patch addresses the issue by initializing the trailing portion of the
physical sector in every logical sector to zeros before use.  A much simpler
but higher overhead fix would be to tag the entire allocation M_ZERO.

PR:		222077
Reported by:	Maxim Khitrov <max AT mxcrypt.com>
Reviewed by:	emaste
Security:	yes
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12272
2017-09-09 01:41:01 +00:00
Scott Long
3d96cd7873 Refactor interrupt allocation and deallocation. Add some extra
diagnostics.  No other functional changes.

Sponsored by:	Netflix
2017-09-08 20:20:35 +00:00
Mateusz Guzik
2e2baf2ec3 Allow __builtin_memset instead of bzero for small buffers of known size
In particular this eliminates function calls and related register save/restore
when only few writes would suffice.

Example speed up can be seen in a fstat microbenchmark on AMD Ryzen cpus, where
the throughput went up by ~4.5%.

Thanks to cem@ for benchmarking and reviewing the patch.

MFC after:	1 week
2017-09-08 20:09:14 +00:00
Konstantin Belousov
3c700e2e4c Enhance qpi.c to make it usable on all Core-microarchitecture Xeons.
Scan all buses for CSR bus, not stopping on the first failed
match. Scan all slots for function 0 on the found bus, for instance on
IvyBridge the slot 0 is not decoded at all. Since the scan is quite
unsafe, and access to the buses is mostly useful for developers,
enable the csr buses scan with the tunable.

Current qpi.c makes too many assumptions about the uncore
configuration buses location and about slots occupied.  Also it
restricts itself only to Nehalem CPUs.  It is needed on all Core-based
Xeons.  On the 2600 v2 (IvyBridge) machine I have access to, the CSR
buses have numbers 31 (BSP socket) and 63 (second socket), and there
is no functions pci0.31.0.0 or pci0.63.0.0.  According to the CPU
datasheet, all devices on the uncore bus occupy slots >= 8.

Practically, the attach to config buses is required for the intel-pcm
pcm-memory.x tool to work, for instance.

Reviewed by:	jhb (previous version)
Sponsored by:	Mellanox Technologies
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D12268
2017-09-08 19:51:03 +00:00
Konstantin Belousov
fd15fee1ed Use IOAPIC PCI rid as the interrupt TLP source id for DMAR interrupt
remapping.

VT-d specification requires use of PCI rid as source id for IOAPICs
enumerated by PCI bus.  The values from the DMAR ACPI table should be
only used when IOAPIC is not on PCI.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
Hardware provided by:	Intel
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D12205
2017-09-08 19:45:37 +00:00
Konstantin Belousov
3fd0053a50 Add an ioapic_get_rid() function to obtain PCIe TLP requester-id for
the interrupt messages from given IOAPIC, if the IOAPIC can be
enumerated on PCI bus.

If IOAPIC has PCI binding, match the PCI device against MADT
enumerated IOAPIC.  Match is done first by registers window physical
address, then by IOAPIC ID as read from the APIC ID register.

PCI bsf address of the matched PCI device is the rid.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
Hardware provided by:	Intel
MFC after:	2 weeks
X-Differential revision:	https://reviews.freebsd.org/D12205
2017-09-08 19:39:20 +00:00
Konstantin Belousov
1a92c8402d Add a constant specifying the min size of the IOAPIC registers window.
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-09-08 19:25:11 +00:00
Maxim Sobolev
c24e7f3fd9 Correct bintime32 declaration: uint32_t sec -> time32_t sec.
Submitted by:	jhb
MFC after:	1 month
2017-09-08 18:32:13 +00:00
Stephen Hurd
47516844a3 Added support for displaying HW port stats using sysctl.
This provides port stats (updated once per second) in
dev.bnxt.X.port_stats for PFs.  VFs do not have access to the port stats.

Submitted by:	Bhargava Chenna Marreddy <bhargava.marreddy@broadcom.com>
Reviewed by:	shurd, sbruno
Approved by:	sbruno (mentor)
Sponsored by:	Broadcom Limited
Differential Revision:	https://reviews.freebsd.org/D11914
2017-09-08 18:03:34 +00:00
Scott Long
3e0ca40a54 Fix intrhook release in MFI as well 2017-09-08 17:51:19 +00:00
Scott Long
55550830cf As with r323317, hold off on releasing the intrhook during boot until
we're ready to accept probing from GEOM.  Untested, but the pattern is
the same as with aac.
2017-09-08 17:40:29 +00:00
Scott Long
cc336c7805 Move the intrhook release to later in the function so that GEOM knows to wait longer
for possible root devices to come online.  This fixes a race that seems to be
triggered by EARLY_AP_STARTUP.

Submitted by:	cgull@glup.org
2017-09-08 16:52:59 +00:00
Konstantin Belousov
dc63dc00cb Fix malloc() uses in em_get_regs().
Do not use malloc(M_NOWAIT), wait is possible there, and the malloc
failures where not checked.  Do not forget to free malloced memory.

Reported and tested by:	pho
Approved by:	sbruno
Sponsored by:	The FreeBSD Foundation
2017-09-08 14:54:07 +00:00
Konstantin Belousov
6ff9ce94ce Consistently use tabs for indent.
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-09-08 10:39:28 +00:00
Andrew Turner
c1649fdb02 Not all CPUs handle reading ID_AA64MMFR2_EL1 (e.g. qemu), disable it for now.
Sponsored by:	DARPA, AFRL
2017-09-08 08:02:06 +00:00
Mateusz Guzik
dad74ce924 namecache: fold the unlock label into the only consumer
No functional changes.

MFC after:	1 week
2017-09-08 06:57:11 +00:00
Mateusz Guzik
da8f32a7f1 namecache: factor out dot lookup into a dedicated function
The intent is to move uncommon cases out of the way.

MFC after:	1 week
2017-09-08 06:51:33 +00:00
Mateusz Guzik
6a569d3525 Annotate Giant with __exclusive_cache_line 2017-09-08 06:46:24 +00:00
Mateusz Guzik
3e72c8449b Annotate global process locks with __exclusive_cache_line
MFC after:	1 week
2017-09-08 06:46:02 +00:00
Conrad Meyer
01a20b9875 mca: Fix printf types from r323289 on i386
Reported by:	Michael Butler <imb AT protected-networks.net>
Sponsored by:	Dell EMC Isilon
2017-09-08 01:06:35 +00:00
Mark Johnston
f93f7cf199 Speed up vm_page_array initialization.
We currently initialize the vm_page array in three passes: one to zero
the array, one to initialize the "order" field of each page (necessary
when inserting them into the vm_phys buddy allocator one-by-one), and
one to initialize the remaining non-zero fields and individually insert
each page into the allocator.

Merge the three passes into one following a suggestion from alc:
initialize vm_page fields in a single pass, and use vm_phys_free_contig()
to efficiently insert physical memory segments into the buddy allocator.
This reduces the initialization time to a third or a quarter of what it
was before on most systems that I tested.

Reviewed by:	alc, kib
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D12248
2017-09-07 21:43:39 +00:00
Conrad Meyer
092c0e867a x86 MCA: Helpfully, print why ECC thresholding is not enabled on AMD
Sponsored by:	Dell EMC Isilon
2017-09-07 21:33:27 +00:00
Conrad Meyer
d848ecfb7e x86 MCA: Enable AMD thresholding support on 17h
17h supports MCA thresholding in the same way as 16h and earlier.
Supposedly a ScalableMca feature bit in CPUID 8000_0007:EBX must be set, but
that was not true for earlier models, so be careful about relying on it.

While here, document a missing bit in LS MCA MISC0.

Reviewed by:	truckman
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12237
2017-09-07 21:31:07 +00:00
Conrad Meyer
cd8c258198 Store AMD RAS Capabilities cpuid value and name flags
Reviewed by:	truckman
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12237
2017-09-07 21:29:51 +00:00
Conrad Meyer
2e81566368 cpufreq(4) hwpstate: Yield CPU awaiting frequency change
It doesn't seem necessary to busy the CPU while waiting to transition
into a different p-state.

PR:		221621 (related, but does not completely address)
Reviewed by:	truckman
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12260
2017-09-07 20:20:12 +00:00
Andrew Turner
f9fc9faa3a Fix the SVE ID field shift.
Sponsored by:	DARPA, AFRL
2017-09-07 19:52:04 +00:00
Andrew Turner
130be885e6 Add the ATS1E1 case to the ID_AA64MMFR1_EL1 decoding.
Sponsored by:	DARPA, AFRL
2017-09-07 19:51:17 +00:00
Mark Johnston
97310754e5 Fix indentation.
MFC after:	1 week
Sponsored by:	Dell EMC Isilon
2017-09-07 19:15:31 +00:00
Andrew Turner
d28b950a4d Use the correct mask when printing undecoded fields from the
ID_AA64MMFR2_EL1 register.

Sponsored by:	DARPA, AFRL
2017-09-07 18:58:55 +00:00
Andrew Turner
d1c2e46d9c Fix a mismerge, make sure PRINT_ID_AA64_MMFR2 has a unique value.
Sponsored by:	DARPA, AFRL
2017-09-07 16:43:12 +00:00
Andrew Turner
1a2e5c004d Fix the value of ID_AA64ISAR1_DPB_SHIFT, the field is bits 3:0.
Sponsored by:	DARPA, AFRL
2017-09-07 16:12:56 +00:00
Warner Losh
84ed53b2c0 Be consistent and do return (1);
Noticed by: tsoome@
Sponsored by: Netflix
2017-09-07 15:46:44 +00:00
Andrew Turner
f45dc6945b Add the ARMv8.2 ID register additions and use them to decode the register
values. As not all assemblers understand the new ID_AA64MMFR2_EL1 register
add a macro to access it. This seems to be safe for older CPUs to read this
new register, with them returning zero.

Sponsored by:	DARPA, AFRL
2017-09-07 15:45:56 +00:00
Andrew Turner
0f962c6deb Uppercase the special register names in identcpu to be more consistent with
the other source files.

Sponsored by:	DARPA, AFRL
2017-09-07 15:30:13 +00:00
Andrew Turner
a0f16159bd Make the bit mask of ARMv8 ID registers to print sparse to keep values
close, but without having to change all values when new registers are added.

Sponsored by:	DARPA, AFRL
2017-09-07 15:24:47 +00:00
Andrew Turner
5ad42f79fb Add more ARM Ltd parts to the list of knows CPUs.
Submitted by:	Jon Brawn <jon@brawn.org>
2017-09-07 15:02:57 +00:00
Warner Losh
1a822dfd33 Fix armv6 build
We need to extend the -Wno-format hack to yet another Makefile to cope
with %S meaning (CHAR16 *) not (wchar_t *) in the context of the EFI
boot loaders.

Sponsored by: Netflix
2017-09-07 07:30:24 +00:00
Warner Losh
1d21184075 ucs2len
Rename boot1's wcslen to ucs2len, which we can't use in userland
because wchar in userland is unsigned, not short. Move it into
efichar.c. Also spell '* 2' as '* sizeof(efi_char)' and add 1 for the
trailing NUL to transition the FreeBSD boot env vars to being NUL
terminated on the same line...

Sponsored by: Netflix
2017-09-07 07:30:05 +00:00
Conrad Meyer
b1631dfb46 cam(4): Fix some warnings
When bcopy is treated as memcpy/memmove, Clang produces warnings that the
size argument doesn't match the type of the source.  This is true, it
doesn't match; we're aliasing the source.

Explicitly cast the source pointer to the expected type to remove the
warning.

No functional change.

Sponsored by:	Dell EMC Isilon
2017-09-07 07:24:22 +00:00
Maxim Sobolev
afbd12c110 In the recvmsg32() system call iterate over returned structure(s)
and convert any messages of types SCM_BINTIME, SCM_TIMESTAMP,
SCM_REALTIME and SCM_MONOTONIC from 64-bit to its 32-bit
representation. Otherwise we either run out of user-supplied
buffer to copy those out resulting in the MSG_CTRUNC or simply
return values that the userland 32-bit code is not going
to parse correctly. This fixes at least two regression tests
failing to function properly in 32-bit compat mode:

    tools/regression/sockets/udp_pingpong
    tools/regression/sockets/unix_cmsg

PR:             kern/222039
MFC after:	30 days
2017-09-07 04:29:57 +00:00
Landon J. Fuller
f526d86d75 bhnd: Remove unsupported USB core IDs from the bhnd_usb device table.
This resolves a SoC reset triggered by attempting to attach to the
BCM5365's USB 1.1 controller.

Approved by:	adrian (mentor, implicit)
2017-09-06 23:43:20 +00:00
Mateusz Guzik
1539873a32 vxge: plug void casts from memcpy/memzero calls
Most of places using them did not have the cast in the first place.

No functional changes.

MFC after:	1 week
2017-09-06 21:38:07 +00:00
Mateusz Guzik
574adb65c8 Sprinkle __read_frequently on few obvious places.
Note that some of annotated variables should probably change their types
to something smaller, preferably bit-sized.
2017-09-06 20:33:33 +00:00
Mateusz Guzik
cf558f10a7 Introduce __read_frequently
While __read_mostly groups variables together, their placement is not
specified. In particular 2 frequently used variables can end up in
different lines.

This annotation is only expected to be used for variables read all the time,
e.g. on each syscall entry.

MFC after:	1 week
2017-09-06 20:32:49 +00:00
Mateusz Guzik
fe933c1d88 Start annotating global _padalign locks with __exclusive_cache_line
While these locks are guarnteed to not share their respective cache lines,
their current placement leaves unnecessary holes in lines which preceeded them.

For instance the annotation of vm_page_queue_free_mtx allows 2 neighbour
cachelines (previously separate by the lock) to be collapsed into 1.

The annotation is only effective on architectures which have it implemented in
their linker script (currently only amd64). Thus locks are not converted to
their not-padaligned variants as to not affect the rest.

MFC after:	1 week
2017-09-06 20:28:18 +00:00
Stephen Hurd
8705464353 bnxt: Update firmware header file with the latest one
hsi_struct_def.h file contains all firmware (HWRM) data struct's, updated
that with the latest one which was released on 30'th Aug.

After this upgrade, HWRM version will be 1.8.1.5 (earlier it was 1.4.0).

Submitted by:	Bhargava Chenna Marreddy <bhargava.marreddy@broadcom.com>
Reviewed by:	shurd, sbruno
Approved by:	sbruno (mentor)
Sponsored by:	Broadcom Limited
Differential Revision:	https://reviews.freebsd.org/D12203
2017-09-06 20:19:30 +00:00
Stephen Hurd
96b2e63f10 bnxt: Use correct firmware call for number of queues supported
1) Based on the suggestion from firmware team, derive
   scctx->isc_ntxqsets_max & scctx->isc_nrxqsets_max based on FUNC_QCFG
   (instead of FUNC_QCAPS).
2) Bump-up driver version to "1.0.0.2".

Submitted by:	Bhargava Chenna Marreddy <bhargava.marreddy@broadcom.com>
Reviewed by:	shurd, sbruno
Approved by:	sbruno (mentor)
Sponsored by:	Broadcom Limited
Differential Revision:	https://reviews.freebsd.org/D12128
2017-09-06 20:14:34 +00:00
Konstantin Belousov
b99b705d9c Skylake server core PMC support for hwpmc(4).
Reviewed by:	emaste
Sponsored by:	The FreeBSD Foundation
Hardware provided by:	Intel
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D12221
2017-09-06 17:19:48 +00:00
Konstantin Belousov
85d88d8799 Do not leak empty swblk.
In swp_pager_meta_build(), if the requested operation results in
freeing the last swap pointer in the swblk, free the trie node.  Other
swap pager code does not expect to find completely empty swblk.

Reviewed by:	alc, markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-09-06 16:18:53 +00:00
Konstantin Belousov
eed99cb81b In swp_pager_meta_build(), handle a race with other thread allocating
swapblk for our index while we dropped the object lock.

Noted by:	jeff
Reviewed by:	alc, markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-09-06 16:16:11 +00:00