Commit Graph

386 Commits

Author SHA1 Message Date
Olivier Houchard
2ec9d05328 MFP4: Bring in arm9 cache-related functions
Obtained from:	NetBSD
2005-11-23 18:02:40 +00:00
Olivier Houchard
94d8cf9916 Force pmap to write-back the pte cacheline after each pte modification,
even if the pte is supposed to be cached in write through mode (might be a
skyeye bug, I'll have to check).
2005-11-21 19:10:44 +00:00
Olivier Houchard
f9126cfb8f Add an alternate ID for the arm920t (the real solution is to have
per-cpu class masks, but oh well).
2005-11-21 19:06:25 +00:00
Alan Cox
97a0c226d6 Eliminate pmap_init2(). It's no longer used. 2005-11-20 06:09:49 +00:00
Olivier Houchard
9e581686a3 There's no need to include <machine/asmacros.h> here. 2005-11-08 13:01:29 +00:00
Olivier Houchard
812779897c MFi386 rev 1.536 (sort of)
Move what can be moved (UMA zones creation, pv_entry_* initialization) from
pmap_init2() to pmap_init().
Create a new function, pmap_postinit(), called from cpu_startup(), to do the
L1 tables allocation.
pmap_init2() is now empty for arm as well.
2005-11-06 16:10:28 +00:00
Robert Watson
5bb84bc84b Normalize a significant number of kernel malloc type names:
- Prefer '_' to ' ', as it results in more easily parsed results in
  memory monitoring tools such as vmstat.

- Remove punctuation that is incompatible with using memory type names
  as file names, such as '/' characters.

- Disambiguate some collisions by adding subsystem prefixes to some
  memory types.

- Generally prefer lower case to upper case.

- If the same type is defined in multiple architecture directories,
  attempt to use the same name in additional cases.

Not all instances were caught in this change, so more work is required to
finish this conversion.  Similar changes are required for UMA zone names.
2005-10-31 15:41:29 +00:00
John Baldwin
e0f66ef861 Reorganize the interrupt handling code a bit to make a few things cleaner
and increase flexibility to allow various different approaches to be tried
in the future.
- Split struct ithd up into two pieces.  struct intr_event holds the list
  of interrupt handlers associated with interrupt sources.
  struct intr_thread contains the data relative to an interrupt thread.
  Currently we still provide a 1:1 relationship of events to threads
  with the exception that events only have an associated thread if there
  is at least one threaded interrupt handler attached to the event.  This
  means that on x86 we no longer have 4 bazillion interrupt threads with
  no handlers.  It also means that interrupt events with only INTR_FAST
  handlers no longer have an associated thread either.
- Renamed struct intrhand to struct intr_handler to follow the struct
  intr_foo naming convention.  This did require renaming the powerpc
  MD struct intr_handler to struct ppc_intr_handler.
- INTR_FAST no longer implies INTR_EXCL on all architectures except for
  powerpc.  This means that multiple INTR_FAST handlers can attach to the
  same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
  to the same interrupt.  Sharing INTR_FAST handlers may not always be
  desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
  either.  Drivers can always still use INTR_EXCL to ask for an interrupt
  exclusively.  The way this sharing works is that when an interrupt
  comes in, all the INTR_FAST handlers are executed first, and if any
  threaded handlers exist, the interrupt thread is scheduled afterwards.
  This type of layout also makes it possible to investigate using interrupt
  filters ala OS X where the filter determines whether or not its companion
  threaded handler should run.
- Aside from the INTR_FAST changes above, the impact on MD interrupt code
  is mostly just 's/ithread/intr_event/'.
- A new MI ddb command 'show intrs' walks the list of interrupt events
  dumping their state.  It also has a '/v' verbose switch which dumps
  info about all of the handlers attached to each event.
- We currently don't destroy an interrupt thread when the last threaded
  handler is removed because it would suck for things like ppbus(8)'s
  braindead behavior.  The code is present, though, it is just under
  #if 0 for now.
- Move the code to actually execute the threaded handlers for an interrrupt
  event into a separate function so that ithread_loop() becomes more
  readable.  Previously this code was all in the middle of ithread_loop()
  and indented halfway across the screen.
- Made struct intr_thread private to kern_intr.c and replaced td_ithd
  with a thread private flag TDP_ITHREAD.
- In statclock, check curthread against idlethread directly rather than
  curthread's proc against idlethread's proc. (Not really related to intr
  changes)

Tested on:	alpha, amd64, i386, sparc64
Tested on:	arm, ia64 (older version of patch by cognet and marcel)
2005-10-25 19:48:48 +00:00
Olivier Houchard
4bc6c6dc6c Unbreak for !__XSCALE__. 2005-10-23 23:09:14 +00:00
Olivier Houchard
b1e157f0e6 Cleanup. 2005-10-20 20:30:51 +00:00
Olivier Houchard
3de553a473 Use the clock count register as a timecounter, as it's more accurate. 2005-10-17 14:51:01 +00:00
John Baldwin
21aa010bb5 Whitespace. 2005-10-14 18:36:49 +00:00
John Baldwin
43e2ef2bb6 Change the userland atomic operations on arm to use memory operands for
the modified memory rather than using register operands that held a pointer
to the memory.  The biggest effect is that we now correctly tell the
compiler that these functions change the memory that these functions
modify.

Reviewed by:	cognet
2005-10-14 18:07:45 +00:00
David Xu
9104847f21 1. Change prototype of trapsignal and sendsig to use ksiginfo_t *, most
changes in MD code are trivial, before this change, trapsignal and
   sendsig use discrete parameters, now they uses member fields of
   ksiginfo_t structure. For sendsig, this change allows us to pass
   POSIX realtime signal value to user code.

2. Remove cpu_thread_siginfo, it is no longer needed because we now always
   generate ksiginfo_t data and feed it to libpthread.

3. Add p_sigqueue to proc structure to hold shared signals which were
   blocked by all threads in the proc.

4. Add td_sigqueue to thread structure to hold all signals delivered to
   thread.

5. i386 and amd64 now return POSIX standard si_code, other arches will
   be fixed.

6. In this sigqueue implementation, pending signal set is kept as before,
   an extra siginfo list holds additional siginfo_t data for signals.
   kernel code uses psignal() still behavior as before, it won't be failed
   even under memory pressure, only exception is when deleting a signal,
   we should call sigqueue_delete to remove signal from sigqueue but
   not SIGDELSET. Current there is no kernel code will deliver a signal
   with additional data, so kernel should be as stable as before,
   a ksiginfo can carry more information, for example, allow signal to
   be delivered but throw away siginfo data if memory is not enough.
   SIGKILL and SIGSTOP have fast path in sigqueue_add, because they can
   not be caught or masked.
   The sigqueue() syscall allows user code to queue a signal to target
   process, if resource is unavailable, EAGAIN will be returned as
   specification said.
   Just before thread exits, signal queue memory will be freed by
   sigqueue_flush.
   Current, all signals are allowed to be queued, not only realtime signals.

Earlier patch reviewed by: jhb, deischen
Tested on: i386, amd64
2005-10-14 12:43:47 +00:00
Olivier Houchard
2dfc7d008b Export PAGE_SIZE from genassym.c, and include assym.s in bcopy_page.S,
instead of <machine/param.h>.
2005-10-06 11:26:37 +00:00
Olivier Houchard
4d71248bc3 Remove a never reached RET. 2005-10-04 20:47:27 +00:00
Olivier Houchard
7bfacf3dc6 strd needs the destination to be double-word aligned, but the pointer passed
to savectx isn't always, so always use stmia, savectx isn't called enough
to need that kind of optimization.
2005-10-04 20:42:42 +00:00
Olivier Houchard
db7db23dd8 dump_avail has nothing to do with ARM_USE_SMALL_ALLOC, so move its
declaration out of the #ifdef.
2005-10-04 16:29:31 +00:00
Olivier Houchard
6270a55ec3 Remove duplicate entry for DDB. 2005-10-04 14:39:33 +00:00
Olivier Houchard
7c616799dc Fix build when DDB isn't defined. 2005-10-04 14:37:03 +00:00
Olivier Houchard
70359cf526 Bring in the good version of this file. 2005-10-03 22:44:54 +00:00
Olivier Houchard
31fbb5019f Add dma and aau. 2005-10-03 14:20:44 +00:00
Olivier Houchard
50f31d87f2 Import dummy drivers for the i80321 DMA controller and AAU.
The DMA controller driver only knows how to do memory to memory copies, and
the AAU driver how to zero a chunk of memory.
Use them to process big (>=1KB) copying/zeroing.
2005-10-03 14:19:55 +00:00
Olivier Houchard
9ea7c8bb52 Make mem.c know about the pages allocated with ARM_USE_SMALL_ALLOC. 2005-10-03 14:18:21 +00:00
Olivier Houchard
735a72bbee Export the variables needed for the copy/zero API. 2005-10-03 14:17:45 +00:00
Olivier Houchard
edcbfd05d1 Make sure the interrupt is masked before processing it, or bad things
can happen.
2005-10-03 14:17:16 +00:00
Olivier Houchard
1f59105ee7 If a thread already tries to allocate a new memory range, wait for it
instead of trying to do the same.
2005-10-03 14:16:41 +00:00
Olivier Houchard
b834efd591 Provide a dump_avail[] variable, which contains the page ranges to be
dumped.

For iq31244_machdep.c, attempt to recognize hints provided by the elf
trampoline.
2005-10-03 14:15:50 +00:00
Olivier Houchard
92399cb788 - Provide the kernel l1pt physical address, for userland.
- Use the new API for pmap_copy_page() and pmap_zero_page().
- Just write-back the pages in pmap_qenter(), and invalidate it in
pmap_qremove().
- Nuke the cache flushing in pmap_enter_quick(), it's not needed anymore.
2005-10-03 14:13:50 +00:00
Olivier Houchard
0122bd1470 Add a new API to let platform-specific ports provide functions for big
copy/zeroing.
2005-10-03 14:12:10 +00:00
Olivier Houchard
87351d5fd2 Export the virtual and physical address in which the kernel was loaded,
needed for userland when reading kernel dumps.
2005-10-03 14:10:55 +00:00
Olivier Houchard
b91c6ffecb Import a small ELF trampoline, in which the kernel is embedded, and that
is able to load the kernel into memory, symbol table included. This is
needed to be able to access the symbol table from DDB without a boot
loader.
2005-10-03 14:09:36 +00:00
Olivier Houchard
ffbce9965f *blush*
Don't try to dereference map if it's NULL.
While I'm there, increase the minimum value to write-back/invalidate the
whole dcache in bus_dmamap_sync().
2005-10-03 14:07:57 +00:00
Olivier Houchard
31c197a753 Only save the registers that are used. 2005-10-03 14:07:09 +00:00
Olivier Houchard
93d18f4760 asm versions of in_cksum_hdr() and in_pseudo(). 2005-10-03 14:06:44 +00:00
Olivier Houchard
6d918e02d0 Implement savectx().
Obtained from:	NetBSD
2005-10-03 14:05:38 +00:00
Olivier Houchard
f7a1a1e2e5 Kernel dump for arm, ripped from the ia64/amd64 version. 2005-10-03 14:05:03 +00:00
John Baldwin
3c2bc2bf26 Add a new atomic_fetchadd() primitive that atomically adds a value to a
variable and returns the previous value of the variable.

Tested on:	i386, alpha, sparc64, arm (cognet)
Reviewed by:	arch@
Submitted by:	cognet (arm)
MFC after:	1 week
2005-09-27 17:39:11 +00:00
Olivier Houchard
0cc67e3dd6 Fix multiple abuses of __RMAN_RESOURCE_VISIBLE in the arm code.
Spotted out by:	phk
2005-09-25 21:06:50 +00:00
Marcel Moolenaar
216e80c2ba Move the prototypes of db_md_set_watchpoint(), db_md_clr_watchpoint()
and db_md_list_watchpoints() to ddb/ddb.h.
2005-09-10 03:01:25 +00:00
Alan Cox
ba8bca610c Pass a value of type vm_prot_t to pmap_enter_quick() so that it determine
whether the mapping should permit execute access.
2005-09-03 18:20:20 +00:00
Stefan Farfeleder
a1f85d7f83 Move MINSIGSTKSZ from <machine/signal.h> to <machine/_limits.h> and rename
it to __MINSIGSTKSZ.  Define MINSIGSTKSZ in <sys/signal.h>.

This is done in order to use MINSIGSTKSZ for the macro PTHREAD_STACK_MIN
in <pthread.h> (soon <limits.h>) without having to include the whole
<sys/signal.h> header.

Discussed with:		bde
2005-08-20 16:44:41 +00:00
Jeff Roberson
8d511e2a05 - Add support for saving stack traces and displaying them via printf(9)
and KTR.

Contributed by:		Antoine Brodin <antoine.brodin@laposte.net>
Concept code from:	Neal Fachan <neal@isilon.com>
2005-08-03 04:27:40 +00:00
Warner Losh
95e4208ebf msdosfs_conv.c references cmos_wall_clock and adjkerntz. Since these
are 0 for arm, define them as such to make msdosfs_conv.c compile
again on arm.
2005-07-27 21:19:28 +00:00
John Baldwin
d9610574a2 Add extra constraints to tell the compiler that the memory be modified
in the arm __swp() and sparc64 casa() and casax() functions is actually
being used as an input and output and not just the value of the register
that points to the memory location.  This was the underlying source of
the mbuf refcount problems on sparc64 a while back.  For arm this should be
a nop because __swp() has a constraint to clobber all memory which can
probably be removed now.

Reviewed by:	alc, cognet
MFC after:	1 week
2005-07-27 20:01:45 +00:00
John Baldwin
e11fe02dfb Use a + constraint modifier for a register arg in __bswap16_var().
Reviewed by:	cognet
2005-07-27 19:59:21 +00:00
John Baldwin
122eceef61 Convert the atomic_ptr() operations over to operating on uintptr_t
variables rather than void * variables.  This makes it easier and simpler
to get asm constraints and volatile keywords correct.

MFC after:	3 days
Tested on:	i386, alpha, sparc64
Compiled on:	ia64, powerpc, amd64
Kernel toolchain busted on:	arm
2005-07-15 18:17:59 +00:00
David Xu
740fd64d65 Validate if the value written into {FS,GS}.base is a canonical
address, writting non-canonical address can cause kernel a panic,
by restricting base values to 0..VM_MAXUSER_ADDRESS, ensuring
only canonical values get written to the registers.

Reviewed by: peter, Josepha Koshy < joseph.koshy at gmail dot com >
Approved by: re (scottl)
2005-07-10 23:31:11 +00:00
Olivier Houchard
758c41b8cc - Use a TAILQ instead of parsing the array to find a free dmamap.
- Inline busdma_alloc_dmamap, busdma_free_dmamap and bus_dmamap_sync_buf.

Approved by:	re (blanket)
2005-06-24 23:57:27 +00:00
John Baldwin
dc802c0628 Fix a typo.
Approved by:	re (scottl)
2005-06-23 21:54:17 +00:00