Commit Graph

16 Commits

Author SHA1 Message Date
Nathan Whitehorn
95e3bfe889 Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2013-12-17 15:11:24 +00:00
Nathan Whitehorn
c826a64307 Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.

Tested by:	zbb
2013-12-16 22:04:47 +00:00
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Nathan Whitehorn
5cd2b97cd0 Teach nexus(4) about Open Firmware (e.g. FDT) on ARM and MIPS, retiring
fdtbus in most cases. This brings ARM and MIPS more in line with existing
Open Firmware platforms like sparc64 and powerpc, as well as preventing
double-enumeration of the OF tree on embedded PowerPC (first through nexus,
then through fdtbus).

This change is also designed to simplify resource management on FDT platforms
by letting there exist a platform-defined root bus resource_activate() call
instead of replying on fdtbus to do the right thing through fdt_bs_tag.
The OFW_BUS_MAP_INTR() and OFW_BUS_CONFIG_INTR() kobj methods are also
available to implement for similar purposes.

Discussed on:	-arm, -mips
Tested by:	zbb, brooks, imp, and others
MFC after:	6 weeks
2013-11-05 13:48:34 +00:00
Grzegorz Bernacki
64dc1cf395 Implement MSI support.
MSI are implemented via Inbound Shared Doorbell 1 interrupts. Interrupts
are triggered by writing to Software Triggered Interrupt registeri (PCIe
card using physical address of this register in BAR0 space). There are 32
interrupts available. It can be increased by using Doorbell 2 and
Doorbell 3 registers to 96 interrupts.

Obtained from:	Marvell, Semihalf
2012-09-14 10:06:56 +00:00
Grzegorz Bernacki
e3ac97538c pci: Implement new memory and io space allocator for PCI.
Cleanup code and move initializing bridge into separate function.
Add checking of PCI mode (RC or endpoint).

Obtained from:	Semihalf
2012-09-14 09:57:41 +00:00
Oleksandr Tymoshenko
16694521fe Merging of projects/armv6, part 7
Add Marvell ARMADA XP support

Obtained from:	Marvell, Semihalf
2012-08-15 05:15:49 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Marcel Moolenaar
1b96faf8fa The FDT describes the host controller directly. There's no need to
get properties from the parent. The parent is in fact the FDT bus
itself and will therefore not have the properties we're looking
for.

Sponsored by: Juniper Networks
2011-02-03 18:07:05 +00:00
Rafal Jaworowski
db5ef4fc77 Convert Marvell ARM platforms to FDT convention.
The following systems are involved:

  - DB-88F5182
  - DB-88F5281
  - DB-88F6281
  - DB-78100
  - SheevaPlug

This overhaul covers the following major changes:

  - All integrated peripherals drivers for Marvell ARM SoC, which are
    currently in the FreeBSD source tree are reworked and adjusted so they
    derive config data out of the device tree blob (instead of hard coded /
    tabelarized values).

  - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
    good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation.
2010-06-13 13:28:53 +00:00
Rafal Jaworowski
bc26e2e38f Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,
handle Z0 revision (early silicon) explicitly due to its quirks.

Obtained from:	Marvell, Semihalf
2009-04-16 11:20:18 +00:00
Rafal Jaworowski
4e883c81d0 Check PCIE link status before accessing the bus.
Some 88F5182-based systems (Linkstation) have problems when PCIE is
accessed without any peripherals present.
2009-01-09 12:38:41 +00:00
Rafal Jaworowski
e7be09420c Improve Marvell SOCs PCI/PCIE driver.
- Provide dedicated rmans for MEM and IO resources.

- Convert PCI IRQ routing info into a table (from callback approach), provide
  config data for alternative DB- boards.

- Fix a wrong boundary check error in pcib_mbus_init_bar()

Obtained from:	Semihalf
2009-01-09 10:20:51 +00:00
Rafal Jaworowski
fe3ea17045 Fix configuration of the PCI bridge. This got omitted in the initial import of
this code.
2008-12-05 15:27:28 +00:00
Rafal Jaworowski
a715909b3e Improve error handling in pcib_mbus_identify(). 2008-11-19 17:07:01 +00:00
Rafal Jaworowski
6975124c23 PCI/PCI-Express support for Marvell systems.
Obtained from:	Marvell, Semihalf
2008-11-19 11:30:44 +00:00