Commit Graph

2967 Commits

Author SHA1 Message Date
Robert Watson
92b98fdabe Remove WITNESS from GENERIC by default: as we grow more locks, this gets
slower, and may be impeding adoption of -CURRENT by developers.  We
recommend turning on WITNESS by default on crash boxes, and when doing
locking development.  It will probably get turned on by default for a week
or two following any major locking commits, also.

Approved by:	all and sundry (jhb, phk, ...)
2002-02-13 07:44:59 +00:00
David Malone
6df7ca7b17 Add an option CPU_ATHLON_SSE_HACK which attempts to enable the SSE
feature bit on newer Athlon CPUs if the BIOS has forgotten to enable
it.

This patch was constructed using some info made available by John
Clemens at http://www.deater.net/john/PavilionN5430.html

Reviewed by:	-audit
MFC after:	3 weeks
2002-02-12 21:13:02 +00:00
David Malone
34221a4505 Move do_cpuid() from a identcpu.c into cpufunc.h. 2002-02-12 21:06:48 +00:00
Alan Cox
7416057d53 Remove an unused (but initialized) variable from vmapbuf(). 2002-02-12 05:50:43 +00:00
Bruce Evans
d2f22d707a Garbage-collect the "LOCORE" version of MPLOCKED. 2002-02-11 03:41:59 +00:00
KATO Takenori
2db0b71862 Cosmetic changes:
- Collected i486 identification codes in one place like
  586 and 686.
- Merged two cases (0x470 and 0x490) for `Enhanced Am486DX4
  Write-Back.'
- Replaced `unknown' into `Unknown'.

Submitted by:	chi@bd.mbn.or.jp (Chiharu Shibata)
2002-02-10 11:23:14 +00:00
Yoshihiro Takahashi
65939fef0f Add needed include. 2002-02-10 10:16:22 +00:00
KATO Takenori
d3a257ce08 Recognize VIA C3 Samuel 2.
MFC after:	3 days
2002-02-09 05:18:01 +00:00
John Baldwin
289da3dd99 Apparently during the KSE M2 commit bzero() on the i386 was changed so that
it's first parameter was volatile.  Catch i486_bzero() and i586_bzero()'s
prototypes up to this to quiet warnings.
2002-02-08 19:16:47 +00:00
John Baldwin
2deac418f3 Don't grab the ICU lock while reading the current pending interrupts and
current masked interrupts from the AT PIC.

Requested by:	bde
2002-02-08 18:30:36 +00:00
Peter Wemm
620080d0c7 Attempt to patch up some style bugs introduced in the previous commit 2002-02-07 22:40:34 +00:00
Julian Elischer
079b7badea Pre-KSE/M3 commit.
this is a low-functionality change that changes the kernel to access the main
thread of a process via the linked list of threads rather than
assuming that it is embedded in the process. It IS still embeded there
but remove all teh code that assumes that in preparation for the next commit
which will actually move it out.

Reviewed by: peter@freebsd.org, gallatin@cs.duke.edu, benno rice,
2002-02-07 20:58:47 +00:00
Poul-Henning Kamp
e0ee6f5629 GC the PC_SWITCH* symbols which are not used in assembly anymore. 2002-02-07 10:27:58 +00:00
Mark Murray
9a29e3250d Make the style a little bit more consistant by removing parameter
names from some prototypes. (Other prototypes here already have
these removed).
2002-02-03 11:21:22 +00:00
Bruce Evans
766f247a59 Use osigreturn(2) instead of sigreturn(2) plus broken magic for returning
from old signal handlers.  This is simpler and faster, and fixes (new)
sigreturn(2) when %eip in the new signal context happens to match the
magic value (0x1d516).  0x1d516 is below the default ELF text section,
so this probably never broken anything in practice.

locore.s:
In addition, don't build the signal trampoline for old signal handlers
when it is not used.

alpha:
Not fixed, but seems to be even less broken in practice due to more
advanced magic. A false match occurs for register #32 in mc_regs[].
Since there is no hardware register #32, a false match is only possible
for direct calls to sigreturn(2) that happen to have the magic number
in the spare mc_regs[32] field.
2002-02-03 09:13:58 +00:00
Bruce Evans
5c8d0a85b0 Improve the change in the previous commit: use a stub for osigreturn()
when it is not really used instead of unconditionalizing all of it.
2002-02-03 04:09:02 +00:00
Bruce Evans
55a9536b65 Compile osigreturn() unconditionally since it will always be needed on
some arches and the syscall table is machine-independent.  It was
(bogusly) conditional on COMPAT_43, so this usually makes no difference.

ia64: in addition:
- replace the bogus cloned comment before osigreturn() by a correct one.
  osigreturn() is just a stub fo ia64's.
- fix the formatting of cloned comment before sigreturn().
- fix the return code.  use nosys() instead of returning ENOSYS to get
  the same semantics as if the syscall is not in the syscall table.
  Generating SIGSYS is actually correct here.
- fix style bugs.

powerpc: copy the cleaned up ia64 stub.  This mainly fixes a bogus comment.

sparc64: copy the cleaned up the ia64 stub, since there was no stub before.
2002-02-01 15:44:03 +00:00
Bruce Evans
92fd4795fa Finish revs.1.23 and 1.24 so that MCOUNT_ENTER really actually compiles
for SMP in the plain profiling case.  It seems to work too.

This error was not detected by LINT because LINT only compiles the
GUPROF profiling case, which is is a superset of the plain profiling
case for !SMP but which is so broken for SMP that the buggy code is
not compiled.
2002-01-31 13:49:55 +00:00
Bruce Evans
7bf8b8eca9 Backed out the main part of revs.1.14-16. Don't disable interrupts in
the packet transfer routines, since rev.1.468 of machdep.c does this
better.  I'm surprised that disabling interrupts helped much.  Disabling
them in the packet receive routine is too late.

Fixed some minor style bugs in rev.1.14.
2002-01-30 18:51:24 +00:00
Bruce Evans
09c98c2c84 Backed out the last vestiges of rev.1.51. Don't enter a critical
region in Debugger(), since rev.1.468 of machdep.c does this better.
Other cosmetic backouts.
2002-01-30 18:23:31 +00:00
Bruce Evans
e64e121dc1 Cleaned up the 0ldSiG magic check before removing it. Just use fuword()
to fetch the magic word instead of useracc() plus a direct access.
This is more efficient as well as simpler and less incorrect:
- it was inefficent because useracc() takes much longer than just
  accessing the data using a correct access method, at least on i386's.
- it was incorrect because direct access is incorrect unless the address
  has been mapped.  This and nearby direct accesses are mostly handled
  better for other arches because they have to be (direct accesses don't
  work).
- using magic in sigreturn is still fundamentally broken because false
  matches are possible.  On i386's, a false match occurs when %eip in a
  new signal context happens to equal the magic value.  This is not
  handled better for other arches.
2002-01-30 17:47:12 +00:00
Bruce Evans
586079cc26 Don't include <isa/isavar.h> or compile code depending on it when isa
is not configured.  Including <isa/isavar.h> when it is not used is
harmful as well as bogus, since it includes "isa_if.h" which is not
generated when isa is not configured.

This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
Bruce Evans
c636c4a872 Removed unused includes. In particular, don't include <isa/isavar.h> since
its only effect is to break the optionality of the isa option.

Sorted includes.
2002-01-30 12:23:49 +00:00
Peter Wemm
755a585260 List bit 18 (reserved, apparently present on thunderbird cpus)
and bit 19 (athlon XP/MP rev 0x662 and later) for amd_features.

Submitted by:  dwcjr
2002-01-22 01:28:32 +00:00
Mike Smith
a245737c51 Add the 'iir' driver, for the Intel Integrated RAID controllers and
prior ICP Vortex models.  This driver was developed by Achim Leubner
of Intel (previously with ICP Vortex) and Boji Kannanthanam of Intel.

Submitted by:	"Kannanthanam, Boji T" <boji.t.kannanthanam@intel.com>
MFC after:	2 weeks
2002-01-20 08:51:08 +00:00
Warner Losh
a8c18609ec The Libretto L series has no $PIR table, but does have a _PIR table.
This typo keeps us from properly routing an interrupt for CardBus
bridges on this machine.  So, now we look for $PIR and then _PIR to
cope.  With these changes, the Libretto L1 now works properly.
Evidentally, the idea comes from patch that the Japanese version of
RedHat (or against a Japanese version of Red Hat), but my Japanese
isn't good enough to to know for sure.

Reported by: Hiroyuki Aizu-san <eyes@navi.org>

# This may be an MFC candidate, but I'm not yet sure.
2002-01-20 03:28:29 +00:00
Peter Wemm
58815d1196 Avoid __func__ string concatenation 2002-01-18 04:41:23 +00:00
Bruce Evans
e744f30933 Changed the type of pcb_flags from u_char to u_int and adjusted things.
This removes the only atomic operation on a char type in the entire
kernel.
2002-01-17 17:49:23 +00:00
Peter Wemm
c056a3ab57 Change <b28> to HTT (Hyperthreading technology). If this flag is set then
cpuid with %eax=1 will return a logical cpu count in bits 16-23 of %ebx.
Bit 29 is actually 'TM' according to AP-485.  This signifies the presence
of the thermal control circuit (which I believe can slow the clock down
to reduce core temperature).
2002-01-16 02:22:19 +00:00
Peter Wemm
77c99f362a Ensure that we set all the %cr0 bits to a known state for the AP's before
they make it through to userland.  This should fix the p5-smp problem
without affecting the other cpus (eg: cyrix, see initcpu.c and the special
cache handling for these cpu types).
2002-01-16 00:44:29 +00:00
Bruce Evans
846ac2266b Clear the single-step flag for signal handlers. This fixes bogus trace
traps on the first instruction of signal handlers.

In trap.c:syscall(), fake a trace trap if the single-step flag was set
on entry to the kernel, not if it will be set on exit from the kernel.
This fixes bogus trace traps after the last instruction of signal handlers.

gdb-4.18 (the version in FreeBSD) still has problems with the program in
the PR.  These seem to be due to bugs in gdb and not in FreeBSD, and are
fixed in gdb-5.1 (the distribution version).

PR:		33262
Tested by:	k Macy <kip_macy@yahoo.com>
MFC after:	1 day
2002-01-10 11:49:55 +00:00
Wes Peters
9539704639 Fix typo in function name.
Reviewed by:	peter@
Obtained from:	mux@sneakerz.org
2002-01-10 03:26:46 +00:00
Daniel Eischen
2e615b482d Use a spare slot in the machine context for a flags word to indicate
whether the machine context is valid and whether the FPU state is
valid (saved).

Mark the machine context valid before copying it out when sending a
signal.

Approved by:	-arch
2002-01-10 02:32:30 +00:00
Takanori Watanabe
89b8315762 Fix S3 breakage.
Now AcpiEnterSleep() is light enough, so flushing cache
before the function is not too early.
2002-01-09 16:00:31 +00:00
Mike Smith
3273b00523 Staticise devclasses and some unnecessarily global variables. 2002-01-08 06:46:01 +00:00
Peter Wemm
ead8168ac0 Convert a bunch of 1 << PCPU_GET(cpuid) to PCPU_GET(cpumask). 2002-01-05 09:41:37 +00:00
John Baldwin
c86b6ff551 Change the preemption code for software interrupt thread schedules and
mutex releases to not require flags for the cases when preemption is
not allowed:

The purpose of the MTX_NOSWITCH and SWI_NOSWITCH flags is to prevent
switching to a higher priority thread on mutex releease and swi schedule,
respectively when that switch is not safe.  Now that the critical section
API maintains a per-thread nesting count, the kernel can easily check
whether or not it should switch without relying on flags from the
programmer.  This fixes a few bugs in that all current callers of
swi_sched() used SWI_NOSWITCH, when in fact, only the ones called from
fast interrupt handlers and the swi_sched of softclock needed this flag.
Note that to ensure that swi_sched()'s in clock and fast interrupt
handlers do not switch, these handlers have to be explicitly wrapped
in critical_enter/exit pairs.  Presently, just wrapping the handlers is
sufficient, but in the future with the fully preemptive kernel, the
interrupt must be EOI'd before critical_exit() is called.  (critical_exit()
can switch due to a deferred preemption in a fully preemptive kernel.)

I've tested the changes to the interrupt code on i386 and alpha.  I have
not tested ia64, but the interrupt code is almost identical to the alpha
code, so I expect it will work fine.  PowerPC and ARM do not yet have
interrupt code in the tree so they shouldn't be broken.  Sparc64 is
broken, but that's been ok'd by jake and tmm who will be fixing the
interrupt code for sparc64 shortly.

Reviewed by:	peter
Tested on:	i386, alpha
2002-01-05 08:47:13 +00:00
Peter Wemm
7ff48af704 Allow a specific setting for pv entries. This avoids the need to guess
(or calculate by hand) the effect of interactions between shpgperproc,
physical ram size, maxproc, maxdsiz, etc.
2002-01-03 00:26:04 +00:00
Matthew Dillon
587bd8bf0a Grrr. The tlb code is strewn over 3 files and I misread it. Revert
the last change (it was a NOP), and remove the XXX comments that no longer
apply.
2001-12-31 20:32:53 +00:00
Matthew Dillon
b00dcfdf74 You know those 'XXX what about SMP' comments in pmap_kenter()? Well,
they were right.  Fix both kenter() and kremove() for SMP by ensuring that
the tlb is flushed on other cpu's.  This will directly solve random-corruption
panic issues in -stable when it is MFC'd.  Better to be safe then sorry, we
can optimize this later.

Original Suspicion by: peter
Maybe MFC: immediately on re's permission
2001-12-31 20:02:46 +00:00
Poul-Henning Kamp
e42d6981f2 GC an alternate trap_pfault() which has rotted away behind an "#ifdef notyet"
since 21-Mar-95 .
2001-12-30 19:43:59 +00:00
Thomas Moestl
01f1aed259 Use the new resource_list_print_type() function.
Pass the bus device to isa_init() (this is needed for the sparc64
version).
2001-12-21 21:54:56 +00:00
John Baldwin
98f9879242 Introduce a standard name for the lock protecting an interrupt controller
and it's associated state variables: icu_lock with the name "icu".  This
renames the imen_mtx for x86 SMP, but also uses the lock to protect
access to the 8259 PIC on x86 UP.  This also adds an appropriate lock to
the various Alpha chipsets which fixes problems with Alpha SMP machines
dropping interrupts with an SMP kernel.
2001-12-20 23:48:31 +00:00
Peter Wemm
ff5a52e18e Replace a bunch of:
for (pv = TAILQ_FIRST(&m->md.pv_list);
               pv;
               pv = TAILQ_NEXT(pv, pv_list)) {
with:
      TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2001-12-20 05:29:59 +00:00
Peter Wemm
c04cbb4706 Fix some whitespace nits, and a minor error that I made in some unused
#ifdef DEBUG code (VM_MAXUSER_ADDRESS vs UPT_MAX_ADDRESS).
2001-12-20 03:49:31 +00:00
John Baldwin
7235f2b1e9 Axe stale extern for a non-existent variable. 2001-12-18 22:42:09 +00:00
Julian Elischer
45449f8432 In a couple of places, we recalculated addresses we already had in local
pointer variables.
2001-12-18 18:46:32 +00:00
John Baldwin
3f9a462fb9 Various assembly fixes mostly in the form of using the "+" modifier for
output operands to mark them as both input and output rather than listing
operands twice.

Reviewed by:	bde
2001-12-18 08:54:39 +00:00
John Baldwin
e4e991e117 Allow the ATOMIC_ASM() macro to pass in the constraints on the V parameter
since the char versions need to use either ax, bx, cx, or dx.

Submitted by:	Peter Jeremy (mostly)
Recommended by:	bde
2001-12-18 08:51:34 +00:00
John Baldwin
7e1f6dfe9d Modify the critical section API as follows:
- The MD functions critical_enter/exit are renamed to start with a cpu_
  prefix.
- MI wrapper functions critical_enter/exit maintain a per-thread nesting
  count and a per-thread critical section saved state set when entering
  a critical section while at nesting level 0 and restored when exiting
  to nesting level 0.  This moves the saved state out of spin mutexes so
  that interlocking spin mutexes works properly.
- Most low-level MD code that used critical_enter/exit now use
  cpu_critical_enter/exit.  MI code such as device drivers and spin
  mutexes use the MI wrappers.  Note that since the MI wrappers store
  the state in the current thread, they do not have any return values or
  arguments.
- mtx_intr_enable() is replaced with a constant CRITICAL_FORK which is
  assigned to curthread->td_savecrit during fork_exit().

Tested on:	i386, alpha
2001-12-18 00:27:18 +00:00