536 lines
15 KiB
C
536 lines
15 KiB
C
/*-
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* Copyright (c) 1998 - 2003 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ata.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#ifdef __alpha__
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#include <machine/md_var.h>
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#endif
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#include <sys/rman.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <dev/ata/ata-all.h>
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#include <dev/ata/ata-pci.h>
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/* local vars */
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static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI");
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/* misc defines */
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#define IOMASK 0xfffffffc
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/* prototypes */
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static int ata_pci_allocate(device_t, struct ata_channel *);
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static int ata_pci_dmainit(struct ata_channel *);
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static void ata_pci_locknoop(struct ata_channel *, int);
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static int
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ata_pci_probe(device_t dev)
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{
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if (pci_get_class(dev) != PCIC_STORAGE)
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return ENXIO;
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switch (pci_get_vendor(dev)) {
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case ATA_ACARD_ID:
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return ata_acard_ident(dev);
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case ATA_ACER_LABS_ID:
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return ata_ali_ident(dev);
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case ATA_AMD_ID:
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return ata_amd_ident(dev);
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case ATA_CYRIX_ID:
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return ata_cyrix_ident(dev);
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case ATA_CYPRESS_ID:
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return ata_cypress_ident(dev);
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case ATA_HIGHPOINT_ID:
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return ata_highpoint_ident(dev);
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case ATA_INTEL_ID:
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return ata_intel_ident(dev);
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case ATA_NVIDIA_ID:
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return ata_nvidia_ident(dev);
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case ATA_PROMISE_ID:
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return ata_promise_ident(dev);
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case ATA_SERVERWORKS_ID:
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return ata_serverworks_ident(dev);
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case ATA_SILICON_IMAGE_ID:
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return ata_sii_ident(dev);
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case ATA_SIS_ID:
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return ata_sis_ident(dev);
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case ATA_VIA_ID:
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return ata_via_ident(dev);
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case 0x16ca:
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if (pci_get_devid(dev) == 0x000116ca) {
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ata_generic_ident(dev);
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device_set_desc(dev, "Cenatek Rocket Drive controller");
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return 0;
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}
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return ENXIO;
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case 0x1042:
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if (pci_get_devid(dev)==0x10001042 || pci_get_devid(dev)==0x10011042) {
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ata_generic_ident(dev);
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device_set_desc(dev,
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"RZ 100? ATA controller !WARNING! buggy HW data loss possible");
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return 0;
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}
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return ENXIO;
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/* unknown chipset, try generic DMA if it seems possible */
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default:
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if (pci_get_class(dev) == PCIC_STORAGE &&
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(pci_get_subclass(dev) == PCIS_STORAGE_IDE))
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return ata_generic_ident(dev);
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}
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return ENXIO;
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}
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static int
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ata_pci_attach(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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u_int8_t class, subclass;
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u_int32_t type, cmd;
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int unit;
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/* set up vendor-specific stuff */
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type = pci_get_devid(dev);
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class = pci_get_class(dev);
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subclass = pci_get_subclass(dev);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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if (!(cmd & PCIM_CMD_PORTEN)) {
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device_printf(dev, "ATA channel disabled by BIOS\n");
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return 0;
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}
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/* do chipset specific setups only needed once */
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if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
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ctlr->channels = 2;
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else
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ctlr->channels = 1;
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ctlr->allocate = ata_pci_allocate;
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ctlr->dmainit = ata_pci_dmainit;
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ctlr->locking = ata_pci_locknoop;
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ctlr->chipinit(dev);
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#ifdef __sparc64__
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if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
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pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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}
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#endif
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/* is busmastering supported and configured ? */
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if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
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int rid = ATA_BMADDR_RID;
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if (!ctlr->r_io2) {
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if (!(ctlr->r_io1 = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0, ~0, 1, RF_ACTIVE)))
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device_printf(dev, "Busmastering DMA not configured\n");
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}
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}
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else
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device_printf(dev, "Busmastering DMA not supported\n");
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/* attach all channels on this controller */
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for (unit = 0; unit < ctlr->channels; unit++)
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device_add_child(dev, "ata", ATA_MASTERDEV(dev) ?
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unit : devclass_find_free_unit(ata_devclass, 2));
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return bus_generic_attach(dev);
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}
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static int
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ata_pci_print_child(device_t dev, device_t child)
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{
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struct ata_channel *ch = device_get_softc(child);
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int retval = 0;
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retval += bus_print_child_header(dev, child);
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retval += printf(": at 0x%lx", rman_get_start(ch->r_io[ATA_IDX_ADDR].res));
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if (ATA_MASTERDEV(dev))
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retval += printf(" irq %d", 14 + ch->unit);
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retval += bus_print_child_footer(dev, child);
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return retval;
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}
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static struct resource *
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ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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struct resource *res = NULL;
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int myrid;
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if (type == SYS_RES_IOPORT) {
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switch (*rid) {
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case ATA_IOADDR_RID:
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if (ATA_MASTERDEV(dev)) {
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myrid = 0;
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start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
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end = start + ATA_IOSIZE - 1;
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count = ATA_IOSIZE;
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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}
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else {
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myrid = 0x10 + 8 * unit;
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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}
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break;
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case ATA_ALTADDR_RID:
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if (ATA_MASTERDEV(dev)) {
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myrid = 0;
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start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
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end = start + ATA_ALTIOSIZE - 1;
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count = ATA_ALTIOSIZE;
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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}
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else {
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myrid = 0x14 + 8 * unit;
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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if (res) {
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start = rman_get_start(res) + 2;
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end = start + ATA_ALTIOSIZE - 1;
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count = ATA_ALTIOSIZE;
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BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, myrid, res);
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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}
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}
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break;
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}
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return res;
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}
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if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
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if (ATA_MASTERDEV(dev)) {
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#ifdef __alpha__
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return alpha_platform_alloc_ide_intr(unit);
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#else
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int irq = (unit == 0 ? 14 : 15);
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return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IRQ, rid, irq, irq, 1, flags);
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#endif
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}
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else {
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return controller->r_irq;
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}
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}
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return 0;
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}
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static int
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ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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if (type == SYS_RES_IOPORT) {
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switch (rid) {
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case ATA_IOADDR_RID:
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if (ATA_MASTERDEV(dev))
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IOPORT, 0x0, r);
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else
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, 0x10 + 8 * unit, r);
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break;
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case ATA_ALTADDR_RID:
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if (ATA_MASTERDEV(dev))
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IOPORT, 0x0, r);
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else
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, 0x14 + 8 * unit, r);
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break;
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default:
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return ENOENT;
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}
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}
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if (type == SYS_RES_IRQ) {
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if (rid != ATA_IRQ_RID)
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return ENOENT;
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if (ATA_MASTERDEV(dev)) {
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#ifdef __alpha__
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return alpha_platform_release_ide_intr(unit, r);
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#else
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IRQ, rid, r);
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#endif
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}
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else
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return 0;
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}
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return EINVAL;
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}
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static int
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ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
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int flags, driver_intr_t *function, void *argument,
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void **cookiep)
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{
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if (ATA_MASTERDEV(dev)) {
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#ifdef __alpha__
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return alpha_platform_setup_ide_intr(child, irq, function, argument,
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cookiep);
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#else
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return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
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flags, function, argument, cookiep);
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#endif
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}
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else {
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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controller->interrupt[unit].function = function;
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controller->interrupt[unit].argument = argument;
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*cookiep = controller;
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return 0;
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}
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}
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static int
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ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
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void *cookie)
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{
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if (ATA_MASTERDEV(dev)) {
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#ifdef __alpha__
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return alpha_platform_teardown_ide_intr(child, irq, cookie);
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#else
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return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
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#endif
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}
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else {
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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controller->interrupt[unit].function = NULL;
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controller->interrupt[unit].argument = NULL;
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return 0;
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}
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}
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static int
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ata_pci_allocate(device_t dev, struct ata_channel *ch)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct resource *io = NULL, *altio = NULL;
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int i, rid;
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rid = ATA_IOADDR_RID;
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io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0, ~0, ATA_IOSIZE, RF_ACTIVE);
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if (!io)
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return ENXIO;
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rid = ATA_ALTADDR_RID;
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altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0, ~0, ATA_ALTIOSIZE, RF_ACTIVE);
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if (!altio) {
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bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
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return ENXIO;
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}
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for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
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ch->r_io[i].res = io;
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ch->r_io[i].offset = i;
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}
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ch->r_io[ATA_ALTSTAT].res = altio;
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ch->r_io[ATA_ALTSTAT].offset = 0;
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ch->r_io[ATA_IDX_ADDR].res = io;
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if (ctlr->r_io1) {
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for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
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ch->r_io[i].res = ctlr->r_io1;
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ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
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}
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/* if simplex controller, only allow DMA on primary channel */
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ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
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(ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
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if (ch->unit > 0 &&
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(ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX))
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device_printf(dev, "simplex device, DMA on primary only\n");
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else
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ctlr->dmainit(ch);
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}
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return 0;
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}
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static int
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ata_pci_dmastart(struct ata_channel *ch, caddr_t data, int32_t count, int dir)
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{
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int error;
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if ((error = ata_dmastart(ch, data, count, dir)))
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return error;
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ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab);
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ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0);
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ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
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(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
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ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
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ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
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return 0;
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}
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static int
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ata_pci_dmastop(struct ata_channel *ch)
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{
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int error;
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error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT);
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ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
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ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
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ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
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ata_dmastop(ch);
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return (error & ATA_BMSTAT_MASK);
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}
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static int
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ata_pci_dmainit(struct ata_channel *ch)
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{
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int error;
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if ((error = ata_dmainit(ch)))
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return error;
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ch->dma->start = ata_pci_dmastart;
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ch->dma->stop = ata_pci_dmastop;
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return 0;
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}
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static void
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ata_pci_locknoop(struct ata_channel *ch, int flags)
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{
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}
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static device_method_t ata_pci_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, ata_pci_probe),
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DEVMETHOD(device_attach, ata_pci_attach),
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DEVMETHOD(device_detach, ata_pci_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* bus methods */
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DEVMETHOD(bus_print_child, ata_pci_print_child),
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DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
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DEVMETHOD(bus_release_resource, ata_pci_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
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|
DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t ata_pci_driver = {
|
|
"atapci",
|
|
ata_pci_methods,
|
|
sizeof(struct ata_pci_controller),
|
|
};
|
|
|
|
static devclass_t ata_pci_devclass;
|
|
|
|
DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
|
|
|
|
static int
|
|
ata_pcisub_probe(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
device_t *children;
|
|
int count, error, i;
|
|
|
|
/* find channel number on this controller */
|
|
device_get_children(device_get_parent(dev), &children, &count);
|
|
for (i = 0; i < count; i++) {
|
|
if (children[i] == dev)
|
|
ch->unit = i;
|
|
}
|
|
free(children, M_TEMP);
|
|
|
|
if ((error = ctlr->allocate(dev, ch)))
|
|
return error;
|
|
|
|
if (ctlr->chip)
|
|
ch->chiptype = ctlr->chip->chipid;
|
|
ch->device[MASTER].setmode = ctlr->setmode;
|
|
ch->device[SLAVE].setmode = ctlr->setmode;
|
|
ch->locking = ctlr->locking;
|
|
return ata_probe(dev);
|
|
}
|
|
|
|
static device_method_t ata_pcisub_methods[] = {
|
|
/* device interface */
|
|
DEVMETHOD(device_probe, ata_pcisub_probe),
|
|
DEVMETHOD(device_attach, ata_attach),
|
|
DEVMETHOD(device_detach, ata_detach),
|
|
DEVMETHOD(device_resume, ata_resume),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t ata_pcisub_driver = {
|
|
"ata",
|
|
ata_pcisub_methods,
|
|
sizeof(struct ata_channel),
|
|
};
|
|
|
|
DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
|