007aeeced6
This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
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| .. | ||
| allwinner | ||
| arm | ||
| at91 | ||
| broadcom/bcm2835 | ||
| conf | ||
| econa | ||
| freescale | ||
| include | ||
| lpc | ||
| mv | ||
| rockchip | ||
| s3c2xx0 | ||
| sa11x0 | ||
| samsung/exynos | ||
| tegra | ||
| ti | ||
| versatile | ||
| xilinx | ||
| xscale | ||