Ruslan Bukin c214a270f5 Allow setting access-width for UART registers. ... This is required for FDT's standard "reg-io-width" property (similar to "reg-shift" property) found in many DTS files. This fixes operation on Altera Arria 10 SOC Development Kit, where standard ns8250 uart allows 4-byte access only. Reviewed by: kan, marcel Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D9785		2017-02-27 20:08:42 +00:00
..
avila_ata.c
avila_gpio.c
avila_led.c
avila_machdep.c
cambria_exp_space.c
cambria_fled.c
cambria_gpio.c
cambria_led.c
files.avila
files.ixp425
if_npe.c
if_npereg.h
ixdp425_pci.c
ixdp425reg.h
ixp425_a4x_io.S
ixp425_a4x_space.c
ixp425_iic.c
ixp425_intr.h
ixp425_mem.c
ixp425_npe.c
ixp425_npereg.h
ixp425_npevar.h
ixp425_pci_asm.S
ixp425_pci_space.c
ixp425_pci.c
ixp425_qmgr.c
ixp425_qmgr.h
ixp425_space.c
ixp425_timer.c
ixp425_wdog.c
ixp425.c
ixp425reg.h
ixp425var.h
std.avila
std.ixp425
std.ixp435
uart_bus_ixp425.c
uart_cpu_ixp425.c