378 lines
9.9 KiB
C
378 lines
9.9 KiB
C
/*-
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/taskqueue.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <sys/kdb.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/mmc/bridge.h>
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#include <dev/mmc/mmcreg.h>
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#include <dev/mmc/mmcbrvar.h>
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#include <dev/sdhci/sdhci.h>
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#include "sdhci_if.h"
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#define BCM2835_DEFAULT_SDHCI_FREQ 50
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#define DEBUG
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#ifdef DEBUG
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#define dprintf(fmt, args...) do { printf("%s(): ", __func__); \
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printf(fmt,##args); } while (0)
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#else
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#define dprintf(fmt, args...)
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#endif
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struct bcm_sdhci_dmamap_arg {
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bus_addr_t sc_dma_busaddr;
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};
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struct bcm_sdhci_softc {
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device_t sc_dev;
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struct mtx sc_mtx;
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struct resource * sc_mem_res;
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struct resource * sc_irq_res;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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void * sc_intrhand;
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struct mmc_request * sc_req;
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struct mmc_data * sc_data;
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uint32_t sc_flags;
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#define LPC_SD_FLAGS_IGNORECRC (1 << 0)
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int sc_xfer_direction;
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#define DIRECTION_READ 0
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#define DIRECTION_WRITE 1
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int sc_xfer_done;
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int sc_bus_busy;
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struct sdhci_slot sc_slot;
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};
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#define SD_MAX_BLOCKSIZE 1024
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/* XXX */
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static int bcm_sdhci_probe(device_t);
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static int bcm_sdhci_attach(device_t);
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static int bcm_sdhci_detach(device_t);
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static void bcm_sdhci_intr(void *);
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static int bcm_sdhci_get_ro(device_t, device_t);
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#define bcm_sdhci_lock(_sc) \
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mtx_lock(&_sc->sc_mtx);
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#define bcm_sdhci_unlock(_sc) \
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mtx_unlock(&_sc->sc_mtx);
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static int
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bcm_sdhci_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-sdhci"))
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return (ENXIO);
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device_set_desc(dev, "Broadcom 2708 SDHCI controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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bcm_sdhci_attach(device_t dev)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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int rid, err;
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phandle_t node;
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pcell_t cell;
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int default_freq;
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sc->sc_dev = dev;
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sc->sc_req = NULL;
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default_freq = BCM2835_DEFAULT_SDHCI_FREQ;
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node = ofw_bus_get_node(sc->sc_dev);
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if ((OF_getprop(node, "clock-frequency", &cell, sizeof(cell))) > 0)
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default_freq = (int)fdt32_to_cpu(cell)/1000000;
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dprintf("SDHCI frequency: %dMHz\n", default_freq);
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mtx_init(&sc->sc_mtx, "bcm sdhci", "sdhci", MTX_DEF);
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "cannot allocate memory window\n");
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err = ENXIO;
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goto fail;
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}
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sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
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sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (!sc->sc_irq_res) {
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device_printf(dev, "cannot allocate interrupt\n");
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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err = ENXIO;
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goto fail;
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}
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if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, bcm_sdhci_intr, sc, &sc->sc_intrhand))
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{
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
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device_printf(dev, "cannot setup interrupt handler\n");
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err = ENXIO;
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goto fail;
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}
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sc->sc_slot.caps = SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_180 | SDHCI_CAN_DO_HISPD;
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sc->sc_slot.caps |= (default_freq << SDHCI_CLOCK_BASE_SHIFT);
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sc->sc_slot.quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
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| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
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| SDHCI_QUIRK_MISSING_CAPS;
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sdhci_init_slot(dev, &sc->sc_slot, 0);
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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sdhci_start_slot(&sc->sc_slot);
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return (0);
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fail:
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if (sc->sc_intrhand)
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand);
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if (sc->sc_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (err);
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}
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static int
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bcm_sdhci_detach(device_t dev)
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{
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return (EBUSY);
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}
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static void
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bcm_sdhci_intr(void *arg)
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{
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struct bcm_sdhci_softc *sc = arg;
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sdhci_generic_intr(&sc->sc_slot);
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}
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static int
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bcm_sdhci_get_ro(device_t bus, device_t child)
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{
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return (0);
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}
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static inline uint32_t
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RD4(struct bcm_sdhci_softc *sc, bus_size_t off)
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{
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uint32_t val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
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return val;
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}
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static inline void
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WR4(struct bcm_sdhci_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
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if ((off != SDHCI_BUFFER && off != SDHCI_INT_STATUS && off != SDHCI_CLOCK_CONTROL))
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{
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int timeout = 100000;
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while (val != bus_space_read_4(sc->sc_bst, sc->sc_bsh, off)
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&& --timeout > 0)
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continue;
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if (timeout <= 0)
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printf("sdhci_brcm: writing 0x%X to reg 0x%X "
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"always gives 0x%X\n",
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val, (uint32_t)off,
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bus_space_read_4(sc->sc_bst, sc->sc_bsh, off));
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}
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}
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static uint8_t
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bcm_sdhci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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uint32_t val = RD4(sc, off & ~3);
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return ((val >> (off & 3)*8) & 0xff);
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}
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static uint16_t
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bcm_sdhci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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uint32_t val = RD4(sc, off & ~3);
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return ((val >> (off & 3)*8) & 0xffff);
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}
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static uint32_t
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bcm_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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return RD4(sc, off);
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}
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static void
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bcm_sdhci_read_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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uint32_t *data, bus_size_t count)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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bus_space_read_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count);
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}
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static void
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bcm_sdhci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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uint32_t val32 = RD4(sc, off & ~3);
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val32 &= ~(0xff << (off & 3)*8);
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val32 |= (val << (off & 3)*8);
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WR4(sc, off & ~3, val32);
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}
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static void
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bcm_sdhci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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static uint32_t cmd_and_trandfer_mode;
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uint32_t val32;
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if (off == SDHCI_COMMAND_FLAGS)
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val32 = cmd_and_trandfer_mode;
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else
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val32 = RD4(sc, off & ~3);
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val32 &= ~(0xffff << (off & 3)*8);
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val32 |= (val << (off & 3)*8);
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if (off == SDHCI_TRANSFER_MODE)
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cmd_and_trandfer_mode = val32;
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else
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WR4(sc, off & ~3, val32);
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}
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static void
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bcm_sdhci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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WR4(sc, off, val);
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}
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static void
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bcm_sdhci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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uint32_t *data, bus_size_t count)
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{
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struct bcm_sdhci_softc *sc = device_get_softc(dev);
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bus_space_write_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count);
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}
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static device_method_t bcm_sdhci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, bcm_sdhci_probe),
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DEVMETHOD(device_attach, bcm_sdhci_attach),
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DEVMETHOD(device_detach, bcm_sdhci_detach),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
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DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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/* MMC bridge interface */
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DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
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DEVMETHOD(mmcbr_request, sdhci_generic_request),
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DEVMETHOD(mmcbr_get_ro, bcm_sdhci_get_ro),
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DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
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DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
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/* SDHCI registers accessors */
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DEVMETHOD(sdhci_read_1, bcm_sdhci_read_1),
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DEVMETHOD(sdhci_read_2, bcm_sdhci_read_2),
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DEVMETHOD(sdhci_read_4, bcm_sdhci_read_4),
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DEVMETHOD(sdhci_read_multi_4, bcm_sdhci_read_multi_4),
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DEVMETHOD(sdhci_write_1, bcm_sdhci_write_1),
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DEVMETHOD(sdhci_write_2, bcm_sdhci_write_2),
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DEVMETHOD(sdhci_write_4, bcm_sdhci_write_4),
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DEVMETHOD(sdhci_write_multi_4, bcm_sdhci_write_multi_4),
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{ 0, 0 }
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};
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static devclass_t bcm_sdhci_devclass;
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static driver_t bcm_sdhci_driver = {
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"sdhci_bcm",
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bcm_sdhci_methods,
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sizeof(struct bcm_sdhci_softc),
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};
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DRIVER_MODULE(sdhci_bcm, simplebus, bcm_sdhci_driver, bcm_sdhci_devclass, 0, 0);
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MODULE_DEPEND(sdhci_bcm, sdhci, 1, 1, 1);
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