02003216e8
similar to what we do for binutils. When clang's default triple starts with 'amd64-', it does not pass a proper -target-cpu option to its first stage. This can lead to problems, for example when structs are memcpy'd, and clang erroneously assumes they are 16-byte aligned. It will then use the 'movaps' SSE instruction to implement the copy, which results in a bus error if the struct is really 8-byte aligned. I encountered this issue when gcc's /usr/libexec/cc1 started crashing with SIGBUS, after rebuilding world with clang ToT, but it also affects the version of clang that we have in the tree. We were just lucky until now, apparently. :)
131 lines
4.5 KiB
Makefile
131 lines
4.5 KiB
Makefile
# $FreeBSD$
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CLANG_SRCS=${LLVM_SRCS}/tools/clang
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CFLAGS+=-I${LLVM_SRCS}/include -I${CLANG_SRCS}/include \
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-I${LLVM_SRCS}/${SRCDIR} ${INCDIR:C/^/-I${LLVM_SRCS}\//} -I. \
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-I${LLVM_SRCS}/../../lib/clang/include \
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-DLLVM_ON_UNIX -DLLVM_ON_FREEBSD \
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-D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS #-DNDEBUG
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# Correct for gcc miscompilation when compiling on PPC with -O2
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.if ${MACHINE_ARCH} == "powerpc"
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CFLAGS+= -O1
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.endif
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TARGET_ARCH?= ${MACHINE_ARCH}
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# XXX: 8.0, to keep __FreeBSD_cc_version happy
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CFLAGS+=-DLLVM_HOSTTRIPLE=\"${TARGET_ARCH:C/amd64/x86_64/}-unknown-freebsd9.0\"
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.ifndef LLVM_REQUIRES_EH
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CXXFLAGS+=-fno-exceptions
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.else
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# If the library or program requires EH, it also requires RTTI.
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LLVM_REQUIRES_RTTI=
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.endif
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.ifndef LLVM_REQUIRES_RTTI
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CXXFLAGS+=-fno-rtti
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.endif
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.ifdef TOOLS_PREFIX
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CFLAGS+=-DCLANG_PREFIX=\"${TOOLS_PREFIX}\"
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.endif
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.PATH: ${LLVM_SRCS}/${SRCDIR}
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TBLGEN=tblgen ${CFLAGS:M-I*}
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Intrinsics.inc.h: ${LLVM_SRCS}/include/llvm/Intrinsics.td
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${TBLGEN} -gen-intrinsic \
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${LLVM_SRCS}/include/llvm/Intrinsics.td > ${.TARGET}
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.for arch in \
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ARM/ARM Mips/Mips PowerPC/PPC X86/X86
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. for hdr in \
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AsmMatcher/-gen-asm-matcher \
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AsmWriter1/-gen-asm-writer,-asmwriternum=1 \
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AsmWriter/-gen-asm-writer \
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CallingConv/-gen-callingconv \
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CodeEmitter/-gen-emitter \
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DAGISel/-gen-dag-isel \
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DisassemblerTables/-gen-disassembler \
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EDInfo/-gen-enhanced-disassembly-info \
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FastISel/-gen-fast-isel \
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InstrInfo/-gen-instr-desc \
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InstrNames/-gen-instr-enums \
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MCCodeEmitter/-gen-emitter,-mc-emitter \
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RegisterInfo.h/-gen-register-desc-header \
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RegisterInfo/-gen-register-desc \
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RegisterNames/-gen-register-enums \
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Subtarget/-gen-subtarget
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${arch:T}Gen${hdr:H:C/$/.inc.h/}: ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
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${TBLGEN} ${hdr:T:C/,/ /g} \
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${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td > ${.TARGET}
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. endfor
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.endfor
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ARMGenDecoderTables.inc.h: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
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${TBLGEN} -gen-arm-decoder ${.ALLSRC} > ${.TARGET}
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Attrs.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-classes ${.ALLSRC} > ${.TARGET}
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AttrImpl.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-impl ${.ALLSRC} > ${.TARGET}
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AttrList.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-list ${.ALLSRC} > ${.TARGET}
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AttrPCHRead.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-pch-read ${.ALLSRC} > ${.TARGET}
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AttrPCHWrite.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-pch-write ${.ALLSRC} > ${.TARGET}
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AttrSpellings.inc.h: ${CLANG_SRCS}/include/clang/Basic/Attr.td
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${TBLGEN} -gen-clang-attr-spelling-list ${.ALLSRC} > ${.TARGET}
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DeclNodes.inc.h: ${CLANG_SRCS}/include/clang/Basic/DeclNodes.td
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${TBLGEN} -gen-clang-decl-nodes ${.ALLSRC} > ${.TARGET}
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StmtNodes.inc.h: ${CLANG_SRCS}/include/clang/Basic/StmtNodes.td
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${TBLGEN} -gen-clang-stmt-nodes ${.ALLSRC} > ${.TARGET}
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arm_neon.inc.h: ${CLANG_SRCS}/include/clang/Basic/arm_neon.td
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${TBLGEN} -gen-arm-neon-sema ${.ALLSRC} > ${.TARGET}
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DiagnosticGroups.inc.h: ${CLANG_SRCS}/include/clang/Basic/Diagnostic.td
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${TBLGEN} -gen-clang-diag-groups -I${CLANG_SRCS}/include/clang/Basic \
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${.ALLSRC} > ${.TARGET}
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DiagnosticIndexName.inc.h: ${CLANG_SRCS}/include/clang/Basic/Diagnostic.td
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${TBLGEN} -gen-clang-diags-index-name \
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-I${CLANG_SRCS}/include/clang/Basic ${.ALLSRC} > ${.TARGET}
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.for hdr in AST Analysis Common Driver Frontend Lex Parse Sema
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Diagnostic${hdr}Kinds.inc.h: ${CLANG_SRCS}/include/clang/Basic/Diagnostic.td
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${TBLGEN} -gen-clang-diags-defs -clang-component=${hdr} \
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-I${CLANG_SRCS}/include/clang/Basic ${.ALLSRC} > ${.TARGET}
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.endfor
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Options.inc.h: ${CLANG_SRCS}/include/clang/Driver/Options.td
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${TBLGEN} -gen-opt-parser-defs -I${CLANG_SRCS}/include/clang/Driver \
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${.ALLSRC} > ${.TARGET}
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CC1Options.inc.h: ${CLANG_SRCS}/include/clang/Driver/CC1Options.td
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${TBLGEN} -gen-opt-parser-defs -I${CLANG_SRCS}/include/clang/Driver \
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${.ALLSRC} > ${.TARGET}
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CC1AsOptions.inc.h: ${CLANG_SRCS}/include/clang/Driver/CC1AsOptions.td
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${TBLGEN} -gen-opt-parser-defs -I${CLANG_SRCS}/include/clang/Driver \
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${.ALLSRC} > ${.TARGET}
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Checkers.inc.h: ${CLANG_SRCS}/lib/StaticAnalyzer/Checkers/Checkers.td \
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${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/CheckerBase.td
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${TBLGEN} -gen-clang-sa-checkers -I${CLANG_SRCS}/include \
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${CLANG_SRCS}/lib/StaticAnalyzer/Checkers/Checkers.td > ${.TARGET}
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SRCS+= ${TGHDRS:C/$/.inc.h/}
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DPADD+= ${TGHDRS:C/$/.inc.h/}
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CLEANFILES+= ${TGHDRS:C/$/.inc.h/}
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