ab3059a8e7
- Change pcpu zone consumers to use a stride size of PAGE_SIZE. (defined as UMA_PCPU_ALLOC_SIZE to make future identification easier) - Allocate page from the correct domain for a given cpu. - Don't initialize pc_domain to non-zero value if NUMA is not defined There are some misconceptions surrounding this field. It is the _VM_ NUMA domain and should only ever correspond to valid domain values as understood by the VM. The former slab size of sizeof(struct pcpu) was somewhat arbitrary. The new value is PAGE_SIZE because that's the smallest granularity which the VM can allocate a slab for a given domain. If you have fewer than PAGE_SIZE/8 counters on your system there will be some memory wasted, but this is obviously something where you want the cache line to be coming from the correct domain. Reviewed by: jeff Sponsored by: Limelight Networks Differential Revision: https://reviews.freebsd.org/D15933
167 lines
3.9 KiB
C
167 lines
3.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2012, 2013 Konstantin Belousov <kib@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MACHINE_COUNTER_H__
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#define __MACHINE_COUNTER_H__
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#include <sys/pcpu.h>
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#ifdef INVARIANTS
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#include <sys/proc.h>
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#endif
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extern struct pcpu __pcpu[];
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#define EARLY_COUNTER &__pcpu[0].pc_early_dummy_counter
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#ifdef __powerpc64__
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#define counter_enter() do {} while (0)
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#define counter_exit() do {} while (0)
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#ifdef IN_SUBR_COUNTER_C
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static inline uint64_t
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counter_u64_read_one(uint64_t *p, int cpu)
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{
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return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu));
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}
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static inline uint64_t
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counter_u64_fetch_inline(uint64_t *p)
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{
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uint64_t r;
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int i;
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r = 0;
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CPU_FOREACH(i)
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r += counter_u64_read_one((uint64_t *)p, i);
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return (r);
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}
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static void
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counter_u64_zero_one_cpu(void *arg)
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{
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*((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE *
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PCPU_GET(cpuid))) = 0;
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}
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static inline void
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counter_u64_zero_inline(counter_u64_t c)
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{
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smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu,
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smp_no_rendezvous_barrier, c);
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}
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#endif
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#define counter_u64_add_protected(c, i) counter_u64_add(c, i)
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static inline void
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counter_u64_add(counter_u64_t c, int64_t inc)
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{
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uint64_t ccpu, old;
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__asm __volatile("\n"
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"1:\n\t"
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"mfsprg %0, 0\n\t"
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"ldarx %1, %0, %2\n\t"
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"add %1, %1, %3\n\t"
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"stdcx. %1, %0, %2\n\t"
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"bne- 1b"
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: "=&b" (ccpu), "=&r" (old)
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: "r" ((char *)c - (char *)&__pcpu[0]), "r" (inc)
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: "cr0", "memory");
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}
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#else /* !64bit */
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#define counter_enter() critical_enter()
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#define counter_exit() critical_exit()
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#ifdef IN_SUBR_COUNTER_C
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/* XXXKIB non-atomic 64bit read */
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static inline uint64_t
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counter_u64_read_one(uint64_t *p, int cpu)
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{
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return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu));
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}
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static inline uint64_t
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counter_u64_fetch_inline(uint64_t *p)
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{
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uint64_t r;
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int i;
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r = 0;
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for (i = 0; i < mp_ncpus; i++)
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r += counter_u64_read_one((uint64_t *)p, i);
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return (r);
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}
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/* XXXKIB non-atomic 64bit store, might interrupt increment */
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static void
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counter_u64_zero_one_cpu(void *arg)
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{
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*((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE *
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PCPU_GET(cpuid))) = 0;
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}
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static inline void
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counter_u64_zero_inline(counter_u64_t c)
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{
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smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu,
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smp_no_rendezvous_barrier, c);
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}
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#endif
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#define counter_u64_add_protected(c, inc) do { \
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CRITICAL_ASSERT(curthread); \
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*(uint64_t *)zpcpu_get(c) += (inc); \
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} while (0)
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static inline void
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counter_u64_add(counter_u64_t c, int64_t inc)
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{
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counter_enter();
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counter_u64_add_protected(c, inc);
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counter_exit();
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}
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#endif /* 64bit */
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#endif /* ! __MACHINE_COUNTER_H__ */
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