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and POWER8. This instruction set unifies the 32 64-bit scalar floating point registers with the 32 128-bit vector registers into a single bank of 64 128-bit registers. Kernel support mostly amounts to saving and restoring the wider version of the floating point registers and making sure that both scalar FP and vector registers are enabled once a VSX instruction is executed. get_mcontext() and friends currently cannot see the high bits, which will require a little more work. As the system compiler (GCC 4.2) does not support VSX, making use of this from userland requires either newer GCC or clang. Relnotes: yes Sponsored by: FreeBSD Foundation |
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| .. | ||
| interrupt.c | ||
| locore32.S | ||
| locore64.S | ||
| locore.S | ||
| machdep.c | ||
| mmu_oea64.c | ||
| mmu_oea64.h | ||
| mmu_oea.c | ||
| moea64_if.m | ||
| moea64_native.c | ||
| mp_cpudep.c | ||
| slb.c | ||
| trap_subr32.S | ||
| trap_subr64.S | ||
| trap.c | ||
| uma_machdep.c | ||