1038 lines
23 KiB
C
1038 lines
23 KiB
C
/*-
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* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* High-level driver for µPD7210 based GPIB cards.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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# define GPIB_DEBUG
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# undef GPIB_DEBUG
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/uio.h>
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#include <sys/time.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <isa/isavar.h>
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#include <dev/ieee488/upd7210.h>
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#include <dev/ieee488/ugpib.h>
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static MALLOC_DEFINE(M_GPIB, "GPIB", "GPIB");
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/* upd7210 generic stuff */
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static void
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print_isr(u_int isr1, u_int isr2)
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{
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printf("isr1=0x%b isr2=0x%b",
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isr1, "\20\10CPT\7APT\6DET\5ENDRX\4DEC\3ERR\2DO\1DI",
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isr2, "\20\10INT\7SRQI\6LOK\5REM\4CO\3LOKC\2REMC\1ADSC");
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}
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static u_int
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read_reg(struct upd7210 *u, enum upd7210_rreg reg)
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{
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u_int r;
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r = bus_space_read_1(
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u->reg_tag[reg],
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u->reg_handle[reg],
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u->reg_offset[reg]);
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u->rreg[reg] = r;
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return (r);
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}
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static void
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write_reg(struct upd7210 *u, enum upd7210_wreg reg, u_int val)
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{
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bus_space_write_1(
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u->reg_tag[reg],
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u->reg_handle[reg],
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u->reg_offset[reg], val);
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u->wreg[reg] = val;
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if (reg == AUXMR)
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u->wreg[8 + (val >> 5)] = val & 0x1f;
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}
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void
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upd7210intr(void *arg)
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{
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u_int isr1, isr2;
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struct upd7210 *u;
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u = arg;
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mtx_lock(&u->mutex);
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isr1 = read_reg(u, ISR1);
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isr2 = read_reg(u, ISR2);
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if (u->busy == 0 || u->irq == NULL || !u->irq(u)) {
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printf("upd7210intr [%02x %02x %02x",
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read_reg(u, DIR), isr1, isr2);
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printf(" %02x %02x %02x %02x %02x] ",
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read_reg(u, SPSR),
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read_reg(u, ADSR),
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read_reg(u, CPTR),
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read_reg(u, ADR0),
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read_reg(u, ADR1));
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print_isr(isr1, isr2);
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printf("\n");
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write_reg(u, IMR1, 0);
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write_reg(u, IMR2, 0);
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}
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mtx_unlock(&u->mutex);
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}
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static int
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upd7210_take_ctrl_async(struct upd7210 *u)
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{
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int i;
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write_reg(u, AUXMR, AUXMR_TCA);
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if (!(read_reg(u, ADSR) & ADSR_ATN))
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return (0);
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for (i = 0; i < 20; i++) {
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DELAY(1);
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if (!(read_reg(u, ADSR) & ADSR_ATN))
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return (0);
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}
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return (1);
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}
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static int
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upd7210_goto_standby(struct upd7210 *u)
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{
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int i;
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write_reg(u, AUXMR, AUXMR_GTS);
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if (read_reg(u, ADSR) & ADSR_ATN)
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return (0);
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for (i = 0; i < 20; i++) {
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DELAY(1);
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if (read_reg(u, ADSR) & ADSR_ATN)
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return (0);
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}
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return (1);
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}
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static int
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deadyet(struct upd7210 *u)
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{
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struct timeval tv;
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if (!timevalisset(&u->deadline))
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return (0);
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getmicrouptime(&tv);
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if (timevalcmp(&u->deadline, &tv, <)) {
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printf("DEADNOW\n");
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return (1);
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}
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return (0);
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}
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/* Unaddressed Listen Only mode */
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static int
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gpib_l_irq(struct upd7210 *u)
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{
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int i;
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if (u->rreg[ISR1] & 1) {
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i = read_reg(u, DIR);
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u->buf[u->buf_wp++] = i;
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u->buf_wp &= (u->bufsize - 1);
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i = (u->buf_rp + u->bufsize - u->buf_wp) & (u->bufsize - 1);
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if (i < 8)
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write_reg(u, IMR1, 0);
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wakeup(u->buf);
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return (1);
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}
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return (0);
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}
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static int
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gpib_l_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct upd7210 *u;
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u = dev->si_drv1;
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mtx_lock(&u->mutex);
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if (u->busy)
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return (EBUSY);
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u->busy = 1;
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u->irq = gpib_l_irq;
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mtx_unlock(&u->mutex);
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u->buf = malloc(PAGE_SIZE, M_GPIB, M_WAITOK);
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u->bufsize = PAGE_SIZE;
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u->buf_wp = 0;
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u->buf_rp = 0;
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write_reg(u, AUXMR, AUXMR_CRST);
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DELAY(10000);
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write_reg(u, AUXMR, C_ICR | 8);
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DELAY(1000);
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write_reg(u, ADR, 0x60);
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write_reg(u, ADR, 0xe0);
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write_reg(u, ADMR, 0x70);
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write_reg(u, AUXMR, AUXMR_PON);
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write_reg(u, IMR1, 0x01);
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return (0);
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}
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static int
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gpib_l_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct upd7210 *u;
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u = dev->si_drv1;
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mtx_lock(&u->mutex);
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u->busy = 0;
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write_reg(u, AUXMR, AUXMR_CRST);
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DELAY(10000);
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write_reg(u, IMR1, 0x00);
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write_reg(u, IMR2, 0x00);
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free(u->buf, M_GPIB);
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u->buf = NULL;
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mtx_unlock(&u->mutex);
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return (0);
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}
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static int
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gpib_l_read(struct cdev *dev, struct uio *uio, int ioflag)
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{
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struct upd7210 *u;
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int error;
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size_t z;
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u = dev->si_drv1;
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error = 0;
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mtx_lock(&u->mutex);
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while (u->buf_wp == u->buf_rp) {
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error = msleep(u->buf, &u->mutex, PZERO | PCATCH,
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"gpibrd", hz);
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if (error && error != EWOULDBLOCK) {
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mtx_unlock(&u->mutex);
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return (error);
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}
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}
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while (uio->uio_resid > 0 && u->buf_wp != u->buf_rp) {
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if (u->buf_wp < u->buf_rp)
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z = u->bufsize - u->buf_rp;
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else
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z = u->buf_wp - u->buf_rp;
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if (z > uio->uio_resid)
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z = uio->uio_resid;
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mtx_unlock(&u->mutex);
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error = uiomove(u->buf + u->buf_rp, z, uio);
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mtx_lock(&u->mutex);
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if (error)
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break;
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u->buf_rp += z;
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u->buf_rp &= (u->bufsize - 1);
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}
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if (u->wreg[IMR1] == 0)
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write_reg(u, IMR1, 0x01);
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mtx_unlock(&u->mutex);
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return (error);
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}
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static struct cdevsw gpib_l_cdevsw = {
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.d_version = D_VERSION,
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.d_name = "gpib_l",
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.d_open = gpib_l_open,
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.d_close = gpib_l_close,
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.d_read = gpib_l_read,
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};
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/* ibfoo API */
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#include <dev/ieee488/ibfoo_int.h>
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struct handle {
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LIST_ENTRY(handle) list;
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int handle;
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int pad;
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int sad;
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struct timeval timeout;
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int eot;
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int eos;
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};
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struct ibfoo {
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struct upd7210 *upd7210;
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LIST_HEAD(,handle) handles;
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struct unrhdr *unrhdr;
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u_char *cmdbuf;
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u_int cmdlen;
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struct handle *rdh; /* addressed for read */
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struct handle *wrh; /* addressed for write */
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u_char *dobuf;
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u_int dolen;
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int doeoi;
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};
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static struct timeval timeouts[] = {
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[TNONE] = { 0, 0},
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[T10us] = { 0, 10},
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[T30us] = { 0, 30},
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[T100us] = { 0, 100},
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[T300us] = { 0, 300},
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[T1ms] = { 0, 1000},
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[T3ms] = { 0, 3000},
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[T10ms] = { 0, 10000},
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[T30ms] = { 0, 30000},
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[T100ms] = { 0, 100000},
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[T300ms] = { 0, 300000},
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[T1s] = { 1, 0},
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[T3s] = { 3, 0},
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[T10s] = { 10, 0},
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[T30s] = { 30, 0},
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[T100s] = { 100, 0},
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[T300s] = { 300, 0},
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[T1000s] = { 1000, 0}
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};
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static u_int max_timeouts = sizeof timeouts / sizeof timeouts[0];
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typedef int ibhandler_t(struct upd7210 *u, struct ibfoo_iocarg *ap);
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static int
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gpib_ib_irq(struct upd7210 *u)
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{
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struct ibfoo *ib;
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ib = u->ibfoo;
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if ((u->rreg[ISR2] & IXR2_CO) && ib->cmdbuf != NULL) {
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if (ib->cmdlen == 0) {
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wakeup(ib);
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ib->cmdbuf = NULL;
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write_reg(u, IMR2, 0);
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return (1);
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}
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write_reg(u, CDOR, *ib->cmdbuf);
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ib->cmdbuf++;
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ib->cmdlen--;
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return (1);
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}
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if ((u->rreg[ISR1] & IXR1_DO) && ib->dobuf != NULL) {
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if (ib->dolen == 0) {
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wakeup(ib);
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ib->dobuf = NULL;
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write_reg(u, IMR1, 0);
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return (1);
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}
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if (ib->dolen == 1 && ib->doeoi)
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write_reg(u, AUXMR, AUXMR_SEOI);
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write_reg(u, CDOR, *ib->dobuf);
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ib->dobuf++;
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ib->dolen--;
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return (1);
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}
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if (u->rreg[ISR1] & IXR1_ENDRX) {
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write_reg(u, IMR1, 0);
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wakeup(ib);
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return (1);
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}
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return (0);
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}
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static void
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config_eos(struct upd7210 *u, struct handle *h)
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{
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int i;
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i = 0;
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if (h->eos & REOS) {
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write_reg(u, EOSR, h->eos & 0xff);
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i |= AUXA_REOS;
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}
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if (h->eos & XEOS) {
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write_reg(u, EOSR, h->eos & 0xff);
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i |= AUXA_XEOS;
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}
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if (h->eos & BIN)
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i |= AUXA_BIN;
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write_reg(u, AUXRA, C_AUXA | i);
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}
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/*
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* Look up the handle, and set the deadline if the handle has a timeout.
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*/
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static int
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gethandle(struct upd7210 *u, struct ibfoo_iocarg *ap, struct handle **hp)
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{
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struct ibfoo *ib;
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struct handle *h;
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KASSERT(ap->__field & __F_HANDLE, ("gethandle without __F_HANDLE"));
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ib = u->ibfoo;
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LIST_FOREACH(h, &ib->handles, list) {
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if (h->handle == ap->handle) {
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*hp = h;
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if (timevalisset(&h->timeout)) {
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getmicrouptime(&u->deadline);
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timevaladd(&u->deadline, &h->timeout);
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} else {
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timevalclear(&u->deadline);
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}
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return (0);
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}
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}
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ap->__iberr = EARG;
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return (1);
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}
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static int
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do_cmd(struct upd7210 *u, u_char *cmd, int len)
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{
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int i, i1, i2;
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struct ibfoo *ib;
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ib = u->ibfoo;
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if (ib->rdh != NULL || ib->wrh != NULL) {
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upd7210_take_ctrl_async(u);
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ib->rdh = NULL;
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ib->wrh = NULL;
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}
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mtx_lock(&u->mutex);
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ib->cmdbuf = cmd;
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ib->cmdlen = len;
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if (!(u->rreg[ISR2] & IXR2_CO)) {
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i1 = read_reg(u, ISR1);
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i2 = read_reg(u, ISR2);
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#ifdef GPIB_DEBUG
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print_isr(i1, i2);
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printf("\n");
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#endif
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}
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write_reg(u, IMR2, IXR2_CO);
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if (u->rreg[ISR2] & IXR2_CO) {
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write_reg(u, CDOR, *ib->cmdbuf);
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ib->cmdbuf++;
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ib->cmdlen--;
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}
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while (1) {
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i = msleep(ib, &u->mutex, PZERO | PCATCH, "gpib_cmd", hz/10);
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if (i == EINTR)
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break;
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if (u->rreg[ISR1] & IXR1_ERR)
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break;
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if (!ib->cmdlen)
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break;
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if (deadyet(u))
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break;
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}
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write_reg(u, IMR2, 0);
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mtx_unlock(&u->mutex);
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return (0);
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}
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static int
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do_odata(struct upd7210 *u, u_char *data, int len, int eos)
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{
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int i1, i2, i;
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struct ibfoo *ib;
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ib = u->ibfoo;
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if (len == 0)
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return (0);
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mtx_lock(&u->mutex);
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ib->dobuf = data;
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ib->dolen = len;
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ib->doeoi = 0;
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if (!(u->rreg[ISR1] & IXR1_DO)) {
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i1 = read_reg(u, ISR1);
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i2 = read_reg(u, ISR2);
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#ifdef GPIB_DEBUG
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print_isr(i1, i2);
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printf("\n");
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#endif
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}
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write_reg(u, IMR1, IXR1_DO);
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if (u->rreg[ISR1] & IXR1_DO) {
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write_reg(u, CDOR, *ib->dobuf);
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ib->dobuf++;
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ib->dolen--;
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}
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while (1) {
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i = msleep(ib, &u->mutex, PZERO | PCATCH, "gpib_out", hz/100);
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if (i == EINTR)
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break;
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if (u->rreg[ISR1] & IXR1_ERR)
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break;
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if (!ib->dolen)
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break;
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if (deadyet(u))
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break;
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}
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write_reg(u, IMR2, 0);
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mtx_unlock(&u->mutex);
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return (len - ib->dolen);
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}
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static int
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do_idata(struct upd7210 *u, u_char *data, int len, int eos)
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{
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|
int i1, i2, i, j;
|
|
|
|
write_reg(u, IMR1, IXR1_ENDRX);
|
|
mtx_lock(&Giant);
|
|
isa_dmastart(ISADMA_READ, data, len, u->dmachan);
|
|
mtx_unlock(&Giant);
|
|
mtx_lock(&u->mutex);
|
|
write_reg(u, IMR2, IMR2_DMAI);
|
|
while (1) {
|
|
i = msleep(u->ibfoo, &u->mutex, PZERO | PCATCH,
|
|
"gpib_idata", hz/100);
|
|
if (i == EINTR)
|
|
break;
|
|
if (isa_dmatc(u->dmachan))
|
|
break;
|
|
if (i == EWOULDBLOCK) {
|
|
i1 = read_reg(u, ISR1);
|
|
i2 = read_reg(u, ISR2);
|
|
} else {
|
|
i1 = u->rreg[ISR1];
|
|
i2 = u->rreg[ISR2];
|
|
}
|
|
if (i1 & IXR1_ENDRX)
|
|
break;
|
|
if (deadyet(u))
|
|
break;
|
|
}
|
|
write_reg(u, IMR1, 0);
|
|
write_reg(u, IMR2, 0);
|
|
mtx_unlock(&u->mutex);
|
|
mtx_lock(&Giant);
|
|
j = isa_dmastatus(u->dmachan);
|
|
isa_dmadone(ISADMA_READ, data, len, u->dmachan);
|
|
mtx_unlock(&Giant);
|
|
if (deadyet(u)) {
|
|
return (-1);
|
|
} else {
|
|
return (len - j);
|
|
}
|
|
}
|
|
|
|
#define ibask NULL
|
|
#define ibbna NULL
|
|
#define ibcac NULL
|
|
#define ibclr NULL
|
|
#define ibcmd NULL
|
|
#define ibcmda NULL
|
|
#define ibconfig NULL
|
|
|
|
static int
|
|
ibdev(struct upd7210 *u, struct ibfoo_iocarg *ap)
|
|
{
|
|
struct handle *h;
|
|
struct ibfoo *ib;
|
|
|
|
if (ap->pad < 0 ||
|
|
ap->pad > 30 ||
|
|
(ap->sad != 0 && ap->sad < 0x60) ||
|
|
ap->sad > 126) {
|
|
ap->__retval = -1;
|
|
ap->__iberr = EARG;
|
|
return (0);
|
|
}
|
|
|
|
ib = u->ibfoo;
|
|
h = malloc(sizeof *h, M_GPIB, M_ZERO | M_WAITOK);
|
|
h->handle = alloc_unr(ib->unrhdr);
|
|
LIST_INSERT_HEAD(&ib->handles, h, list);
|
|
h->pad = ap->pad;
|
|
h->sad = ap->sad;
|
|
h->timeout = timeouts[ap->tmo];
|
|
h->eot = ap->eot;
|
|
h->eos = ap->eos;
|
|
ap->__retval = h->handle;
|
|
return (0);
|
|
}
|
|
|
|
#define ibdiag NULL
|
|
#define ibdma NULL
|
|
|
|
static int
|
|
ibeos(struct upd7210 *u, struct ibfoo_iocarg *ap)
|
|
{
|
|
struct handle *h;
|
|
struct ibfoo *ib;
|
|
|
|
if (gethandle(u, ap, &h))
|
|
return (0);
|
|
ib = u->ibfoo;
|
|
h->eos = ap->eos;
|
|
if (ib->rdh == h)
|
|
config_eos(u, h);
|
|
ap->__retval = 0;
|
|
return (0);
|
|
}
|
|
|
|
#define ibeot NULL
|
|
#define ibevent NULL
|
|
#define ibfind NULL
|
|
#define ibgts NULL
|
|
#define ibist NULL
|
|
#define iblines NULL
|
|
#define ibllo NULL
|
|
#define ibln NULL
|
|
#define ibloc NULL
|
|
#define ibonl NULL
|
|
#define ibpad NULL
|
|
#define ibpct NULL
|
|
#define ibpoke NULL
|
|
#define ibppc NULL
|
|
|
|
static int
|
|
ibrd(struct upd7210 *u, struct ibfoo_iocarg *ap)
|
|
{
|
|
struct ibfoo *ib;
|
|
struct handle *h;
|
|
u_char buf[10], *bp;
|
|
int i, j, error, bl, bc;
|
|
u_char *dp;
|
|
|
|
ib = u->ibfoo;
|
|
if (gethandle(u, ap, &h))
|
|
return (0);
|
|
bl = ap->cnt;
|
|
if (bl > PAGE_SIZE)
|
|
bl = PAGE_SIZE;
|
|
bp = malloc(bl, M_GPIB, M_WAITOK);
|
|
|
|
if (ib->rdh != h) {
|
|
i = 0;
|
|
buf[i++] = UNT;
|
|
buf[i++] = UNL;
|
|
buf[i++] = LAD | 0;
|
|
buf[i++] = TAD | h->pad;
|
|
if (h->sad)
|
|
buf[i++] = h->sad;
|
|
i = do_cmd(u, buf, i);
|
|
config_eos(u, h);
|
|
ib->rdh = h;
|
|
ib->wrh = NULL;
|
|
upd7210_goto_standby(u);
|
|
}
|
|
ap->__ibcnt = 0;
|
|
dp = ap->buffer;
|
|
bc = ap->cnt;
|
|
error = 0;
|
|
while (bc > 0) {
|
|
j = imin(bc, PAGE_SIZE);
|
|
i = do_idata(u, bp, j, 1);
|
|
if (i <= 0)
|
|
break;
|
|
error = copyout(bp, dp , i);
|
|
if (error)
|
|
break;
|
|
ap->__ibcnt += i;
|
|
if (i != j)
|
|
break;
|
|
bc -= i;
|
|
dp += i;
|
|
}
|
|
free(bp, M_GPIB);
|
|
ap->__retval = 0;
|
|
return (error);
|
|
}
|
|
|
|
#define ibrda NULL
|
|
#define ibrdf NULL
|
|
#define ibrdkey NULL
|
|
#define ibrpp NULL
|
|
#define ibrsc NULL
|
|
#define ibrsp NULL
|
|
#define ibrsv NULL
|
|
#define ibsad NULL
|
|
#define ibsgnl NULL
|
|
#define ibsic NULL
|
|
#define ibsre NULL
|
|
#define ibsrq NULL
|
|
#define ibstop NULL
|
|
|
|
static int
|
|
ibtmo(struct upd7210 *u, struct ibfoo_iocarg *ap)
|
|
{
|
|
struct handle *h;
|
|
|
|
if (gethandle(u, ap, &h))
|
|
return (0);
|
|
h->timeout = timeouts[ap->tmo];
|
|
return (0);
|
|
}
|
|
|
|
#define ibtrap NULL
|
|
#define ibtrg NULL
|
|
#define ibwait NULL
|
|
|
|
static int
|
|
ibwrt(struct upd7210 *u, struct ibfoo_iocarg *ap)
|
|
{
|
|
struct ibfoo *ib;
|
|
struct handle *h;
|
|
u_char buf[10], *bp;
|
|
int i;
|
|
|
|
ib = u->ibfoo;
|
|
if (gethandle(u, ap, &h))
|
|
return (0);
|
|
bp = malloc(ap->cnt, M_GPIB, M_WAITOK);
|
|
i = copyin(ap->buffer, bp, ap->cnt);
|
|
if (i) {
|
|
free(bp, M_GPIB);
|
|
return (i);
|
|
}
|
|
if (ib->wrh != h) {
|
|
i = 0;
|
|
buf[i++] = UNT;
|
|
buf[i++] = UNL;
|
|
buf[i++] = LAD | h->pad;
|
|
if (h->sad)
|
|
buf[i++] = LAD | TAD | h->sad;
|
|
buf[i++] = TAD | 0;
|
|
i = do_cmd(u, buf, i);
|
|
ib->rdh = NULL;
|
|
ib->wrh = h;
|
|
upd7210_goto_standby(u);
|
|
config_eos(u, h);
|
|
}
|
|
i = do_odata(u, bp, ap->cnt, 1);
|
|
ap->__ibcnt = i;
|
|
ap->__retval = 0;
|
|
free(bp, M_GPIB);
|
|
return (0);
|
|
}
|
|
|
|
#define ibwrta NULL
|
|
#define ibwrtf NULL
|
|
#define ibwrtkey NULL
|
|
#define ibxtrc NULL
|
|
|
|
static struct ibhandler {
|
|
const char *name;
|
|
ibhandler_t *func;
|
|
u_int args;
|
|
} ibhandlers[] = {
|
|
[__ID_IBASK] = { "ibask", ibask, __F_HANDLE | __F_OPTION | __F_RETVAL },
|
|
[__ID_IBBNA] = { "ibbna", ibbna, __F_HANDLE | __F_BDNAME },
|
|
[__ID_IBCAC] = { "ibcac", ibcac, __F_HANDLE | __F_V },
|
|
[__ID_IBCLR] = { "ibclr", ibclr, __F_HANDLE },
|
|
[__ID_IBCMDA] = { "ibcmda", ibcmda, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBCMD] = { "ibcmd", ibcmd, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBCONFIG] = { "ibconfig", ibconfig, __F_HANDLE | __F_OPTION | __F_VALUE },
|
|
[__ID_IBDEV] = { "ibdev", ibdev, __F_BOARDID | __F_PAD | __F_SAD | __F_TMO | __F_EOT | __F_EOS },
|
|
[__ID_IBDIAG] = { "ibdiag", ibdiag, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBDMA] = { "ibdma", ibdma, __F_HANDLE | __F_V },
|
|
[__ID_IBEOS] = { "ibeos", ibeos, __F_HANDLE | __F_EOS },
|
|
[__ID_IBEOT] = { "ibeot", ibeot, __F_HANDLE | __F_V },
|
|
[__ID_IBEVENT] = { "ibevent", ibevent, __F_HANDLE | __F_EVENT },
|
|
[__ID_IBFIND] = { "ibfind", ibfind, __F_BDNAME },
|
|
[__ID_IBGTS] = { "ibgts", ibgts, __F_HANDLE | __F_V },
|
|
[__ID_IBIST] = { "ibist", ibist, __F_HANDLE | __F_V },
|
|
[__ID_IBLINES] = { "iblines", iblines, __F_HANDLE | __F_LINES },
|
|
[__ID_IBLLO] = { "ibllo", ibllo, __F_HANDLE },
|
|
[__ID_IBLN] = { "ibln", ibln, __F_HANDLE | __F_PADVAL | __F_SADVAL | __F_LISTENFLAG },
|
|
[__ID_IBLOC] = { "ibloc", ibloc, __F_HANDLE },
|
|
[__ID_IBONL] = { "ibonl", ibonl, __F_HANDLE | __F_V },
|
|
[__ID_IBPAD] = { "ibpad", ibpad, __F_HANDLE | __F_V },
|
|
[__ID_IBPCT] = { "ibpct", ibpct, __F_HANDLE },
|
|
[__ID_IBPOKE] = { "ibpoke", ibpoke, __F_HANDLE | __F_OPTION | __F_VALUE },
|
|
[__ID_IBPPC] = { "ibppc", ibppc, __F_HANDLE | __F_V },
|
|
[__ID_IBRDA] = { "ibrda", ibrda, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBRDF] = { "ibrdf", ibrdf, __F_HANDLE | __F_FLNAME },
|
|
[__ID_IBRDKEY] = { "ibrdkey", ibrdkey, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBRD] = { "ibrd", ibrd, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBRPP] = { "ibrpp", ibrpp, __F_HANDLE | __F_PPR },
|
|
[__ID_IBRSC] = { "ibrsc", ibrsc, __F_HANDLE | __F_V },
|
|
[__ID_IBRSP] = { "ibrsp", ibrsp, __F_HANDLE | __F_SPR },
|
|
[__ID_IBRSV] = { "ibrsv", ibrsv, __F_HANDLE | __F_V },
|
|
[__ID_IBSAD] = { "ibsad", ibsad, __F_HANDLE | __F_V },
|
|
[__ID_IBSGNL] = { "ibsgnl", ibsgnl, __F_HANDLE | __F_V },
|
|
[__ID_IBSIC] = { "ibsic", ibsic, __F_HANDLE },
|
|
[__ID_IBSRE] = { "ibsre", ibsre, __F_HANDLE | __F_V },
|
|
[__ID_IBSRQ] = { "ibsrq", ibsrq, __F_FUNC },
|
|
[__ID_IBSTOP] = { "ibstop", ibstop, __F_HANDLE },
|
|
[__ID_IBTMO] = { "ibtmo", ibtmo, __F_HANDLE | __F_TMO },
|
|
[__ID_IBTRAP] = { "ibtrap", ibtrap, __F_MASK | __F_MODE },
|
|
[__ID_IBTRG] = { "ibtrg", ibtrg, __F_HANDLE },
|
|
[__ID_IBWAIT] = { "ibwait", ibwait, __F_HANDLE | __F_MASK },
|
|
[__ID_IBWRTA] = { "ibwrta", ibwrta, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBWRTF] = { "ibwrtf", ibwrtf, __F_HANDLE | __F_FLNAME },
|
|
[__ID_IBWRTKEY] = { "ibwrtkey", ibwrtkey, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBWRT] = { "ibwrt", ibwrt, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
[__ID_IBXTRC] = { "ibxtrc", ibxtrc, __F_HANDLE | __F_BUFFER | __F_CNT },
|
|
};
|
|
|
|
static u_int max_ibhandler = sizeof ibhandlers / sizeof ibhandlers[0];
|
|
|
|
static int
|
|
gpib_ib_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
|
|
{
|
|
struct upd7210 *u;
|
|
struct ibfoo *ib;
|
|
int error;
|
|
|
|
u = dev->si_drv1;
|
|
|
|
mtx_lock(&u->mutex);
|
|
if (u->busy) {
|
|
mtx_unlock(&u->mutex);
|
|
return (EBUSY);
|
|
}
|
|
u->busy = 1;
|
|
mtx_unlock(&u->mutex);
|
|
|
|
mtx_lock(&Giant);
|
|
error = isa_dma_acquire(u->dmachan);
|
|
if (!error) {
|
|
error = isa_dma_init(u->dmachan, PAGE_SIZE, M_WAITOK);
|
|
if (error)
|
|
isa_dma_release(u->dmachan);
|
|
}
|
|
mtx_unlock(&Giant);
|
|
if (error) {
|
|
mtx_lock(&u->mutex);
|
|
u->busy = 0;
|
|
mtx_unlock(&u->mutex);
|
|
return (error);
|
|
}
|
|
|
|
ib = malloc(sizeof *ib, M_GPIB, M_WAITOK | M_ZERO);
|
|
LIST_INIT(&ib->handles);
|
|
ib->unrhdr = new_unrhdr(0, INT_MAX);
|
|
dev->si_drv2 = ib;
|
|
ib->upd7210 = u;
|
|
u->ibfoo = ib;
|
|
u->irq = gpib_ib_irq;
|
|
|
|
write_reg(u, AUXMR, AUXMR_CRST);
|
|
DELAY(10000);
|
|
DELAY(1000);
|
|
write_reg(u, IMR1, 0x00);
|
|
write_reg(u, IMR2, 0x00);
|
|
write_reg(u, SPMR, 0x00);
|
|
write_reg(u, ADR, 0x00);
|
|
write_reg(u, ADR, ADR_ARS | ADR_DL | ADR_DT);
|
|
write_reg(u, ADMR, ADMR_ADM0 | ADMR_TRM0 | ADMR_TRM1);
|
|
write_reg(u, EOSR, 0x00);
|
|
write_reg(u, AUXMR, C_ICR | 8);
|
|
write_reg(u, AUXMR, C_PPR | PPR_U);
|
|
write_reg(u, AUXMR, C_AUXA);
|
|
write_reg(u, AUXMR, C_AUXB + 3);
|
|
write_reg(u, AUXMR, C_AUXE + 0);
|
|
write_reg(u, AUXMR, AUXMR_PON);
|
|
write_reg(u, AUXMR, AUXMR_CIFC);
|
|
DELAY(100);
|
|
write_reg(u, AUXMR, AUXMR_SIFC);
|
|
write_reg(u, AUXMR, AUXMR_SREN);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
gpib_ib_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
|
|
{
|
|
struct upd7210 *u;
|
|
struct ibfoo *ib;
|
|
|
|
u = dev->si_drv1;
|
|
ib = dev->si_drv2;
|
|
/* XXX: assert pointer consistency */
|
|
|
|
u->ibfoo = NULL;
|
|
/* XXX: free handles */
|
|
dev->si_drv2 = NULL;
|
|
free(ib, M_GPIB);
|
|
|
|
mtx_lock(&Giant);
|
|
isa_dma_release(u->dmachan);
|
|
mtx_unlock(&Giant);
|
|
mtx_lock(&u->mutex);
|
|
u->busy = 0;
|
|
write_reg(u, IMR1, 0x00);
|
|
write_reg(u, IMR2, 0x00);
|
|
write_reg(u, AUXMR, AUXMR_CRST);
|
|
DELAY(10000);
|
|
mtx_unlock(&u->mutex);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
gpib_ib_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td)
|
|
{
|
|
struct ibfoo_iocarg *ap;
|
|
struct ibhandler *ih;
|
|
struct upd7210 *u;
|
|
int error;
|
|
|
|
u = dev->si_drv1;
|
|
|
|
if (cmd != GPIB_IBFOO)
|
|
return (ENOIOCTL);
|
|
|
|
ap = (void *)data;
|
|
if (ap->__ident < 0 || ap->__ident >= max_ibhandler)
|
|
return (EINVAL);
|
|
ih = &ibhandlers[ap->__ident];
|
|
if (ap->__field != ih->args)
|
|
return (EINVAL);
|
|
|
|
if (ap->__field & __F_TMO) {
|
|
if (ap->tmo < 0 || ap->tmo >= max_timeouts) {
|
|
ap->__retval = -1;
|
|
ap->__iberr = EARG;
|
|
return (0);
|
|
}
|
|
}
|
|
|
|
if (ap->__field & __F_EOS) {
|
|
if (ap->eos & ~(REOS | XEOS | BIN | 0xff)) {
|
|
ap->__retval = -1;
|
|
ap->__iberr = EARG;
|
|
return (0);
|
|
}
|
|
if (ap->eos & (REOS | XEOS)) {
|
|
if ((ap->eos & (BIN | 0x80)) == 0x80) {
|
|
ap->__retval = -1;
|
|
ap->__iberr = EARG;
|
|
return (0);
|
|
}
|
|
} else if (ap->eos != 0) {
|
|
ap->__retval = -1;
|
|
ap->__iberr = EARG;
|
|
return (0);
|
|
}
|
|
}
|
|
|
|
mtx_lock(&u->mutex);
|
|
while(u->busy != 1) {
|
|
error = msleep(u->ibfoo, &u->mutex, PZERO | PCATCH,
|
|
"gpib_ibioctl", 0);
|
|
if (error) {
|
|
mtx_unlock(&u->mutex);
|
|
return (EINTR);
|
|
}
|
|
}
|
|
u->busy = 2;
|
|
mtx_unlock(&u->mutex);
|
|
|
|
#ifdef GPIB_DEBUG
|
|
if (ih->name != NULL)
|
|
printf("%s(", ih->name);
|
|
else
|
|
printf("ibinvalid(");
|
|
printf("[0x%x]", ap->__field);
|
|
if (ap->__field & __F_HANDLE) printf(" handle=%d", ap->handle);
|
|
if (ap->__field & __F_EOS) printf(" eos=%d", ap->eos);
|
|
if (ap->__field & __F_EOT) printf(" eot=%d", ap->eot);
|
|
if (ap->__field & __F_TMO) printf(" tmo=%d", ap->tmo);
|
|
if (ap->__field & __F_PAD) printf(" pad=%d", ap->pad);
|
|
if (ap->__field & __F_SAD) printf(" sad=%d", ap->sad);
|
|
if (ap->__field & __F_BUFFER) printf(" buffer=%p", ap->buffer);
|
|
if (ap->__field & __F_CNT) printf(" cnt=%ld", ap->cnt);
|
|
/* XXX more ... */
|
|
printf(")\n");
|
|
#endif
|
|
|
|
ap->__iberr = 0;
|
|
error = EOPNOTSUPP;
|
|
if (ih->func != NULL)
|
|
error = ih->func(u, ap);
|
|
if (error) {
|
|
ap->__retval = EDVR;
|
|
ap->__iberr = EDVR;
|
|
ap->__ibcnt = error;
|
|
} else if (ap->__iberr) {
|
|
ap->__retval = -1;
|
|
}
|
|
#ifdef GPIB_DEBUG
|
|
printf("%s(...) = %d (error=%d)\n", ih->name, ap->__retval, error);
|
|
#endif
|
|
mtx_lock(&u->mutex);
|
|
u->busy = 1;
|
|
wakeup(u->ibfoo);
|
|
mtx_unlock(&u->mutex);
|
|
return (error);
|
|
}
|
|
|
|
static struct cdevsw gpib_ib_cdevsw = {
|
|
.d_version = D_VERSION,
|
|
.d_name = "gpib_ib",
|
|
.d_open = gpib_ib_open,
|
|
.d_ioctl = gpib_ib_ioctl,
|
|
.d_close = gpib_ib_close,
|
|
};
|
|
|
|
/* Housekeeping */
|
|
|
|
void
|
|
upd7210attach(struct upd7210 *u)
|
|
{
|
|
int unit = 0;
|
|
struct cdev *dev;
|
|
|
|
mtx_init(&u->mutex, "gpib", NULL, MTX_DEF);
|
|
u->cdev = make_dev(&gpib_l_cdevsw, unit,
|
|
UID_ROOT, GID_WHEEL, 0444,
|
|
"gpib%ul", unit);
|
|
u->cdev->si_drv1 = u;
|
|
|
|
dev = make_dev(&gpib_ib_cdevsw, unit,
|
|
UID_ROOT, GID_WHEEL, 0444,
|
|
"gpib%uib", unit);
|
|
dev->si_drv1 = u;
|
|
dev_depends(u->cdev, dev);
|
|
}
|