9dba612805
Since device can pass multiple frames in a single payload temporary Rx buffer was big enough to hold all of them; now the driver can concatenate a single frame from multiple payloads. The Rx buffer size may be configured via tunable (dev.rtwn.%d.rx_buf_size). Tested with: - rtl8188cus, rtl8188eu and rtl8821au (STA mode). - (by kevlo) rtl8192cu and rtl8188eu. PR: 218527 Reviewed by: kevlo Differential Revision: https://reviews.freebsd.org/D11705
173 lines
4.1 KiB
C
173 lines
4.1 KiB
C
/*-
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* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
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* $FreeBSD$
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*/
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#ifndef IF_RTWNREG_H
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#define IF_RTWNREG_H
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#define R92C_MIN_TX_PWR 0x00
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#define R92C_MAX_TX_PWR 0x3f
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#define R92C_H2C_NBOX 4
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/* Common part of Tx descriptor (named only!). */
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struct rtwn_tx_desc_common {
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uint16_t pktlen;
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uint8_t offset;
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uint8_t flags0;
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#define RTWN_FLAGS0_OWN 0x80
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uint32_t txdw1;
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/* NB: qsel is shared too; however, it looks better at the lower level */
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#define RTWN_TXDW1_CIPHER_M 0x00c00000
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#define RTWN_TXDW1_CIPHER_S 22
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#define RTWN_TXDW1_CIPHER_NONE 0
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#define RTWN_TXDW1_CIPHER_RC4 1
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#define RTWN_TXDW1_CIPHER_SM4 2
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#define RTWN_TXDW1_CIPHER_AES 3
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uint32_t reserved[5];
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union txdw7_shared {
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uint16_t usb_checksum;
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uint16_t pci_txbufsize;
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} txdw7;
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} __packed __attribute__((aligned(4)));
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/* Common part of Rx descriptor. */
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struct rtwn_rx_stat_common {
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uint32_t rxdw0;
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#define RTWN_RXDW0_PKTLEN_M 0x00003fff
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#define RTWN_RXDW0_PKTLEN_S 0
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#define RTWN_RXDW0_CRCERR 0x00004000
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#define RTWN_RXDW0_ICVERR 0x00008000
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#define RTWN_RXDW0_INFOSZ_M 0x000f0000
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#define RTWN_RXDW0_INFOSZ_S 16
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#define RTWN_RXDW0_CIPHER_M 0x00700000
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#define RTWN_RXDW0_CIPHER_S 20
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#define RTWN_RXDW0_QOS 0x00800000
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#define RTWN_RXDW0_SHIFT_M 0x03000000
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#define RTWN_RXDW0_SHIFT_S 24
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#define RTWN_RXDW0_PHYST 0x04000000
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#define RTWN_RXDW0_SWDEC 0x08000000
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#define RTWN_RXDW0_LS 0x10000000
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#define RTWN_RXDW0_FS 0x20000000
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#define RTWN_RXDW0_EOR 0x40000000
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#define RTWN_RXDW0_OWN 0x80000000
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uint32_t rxdw1;
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#define RTWN_RXDW1_AMSDU 0x00002000
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#define RTWN_RXDW1_MC 0x40000000
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#define RTWN_RXDW1_BC 0x80000000
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uint32_t rxdw2;
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uint32_t rxdw3;
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#define RTWN_RXDW3_HTC 0x00000400
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#define RTWN_RXDW3_BSSID01_FIT_M 0x00003000
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#define RTWN_RXDW3_BSSID01_FIT_S 12
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uint32_t rxdw4;
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uint32_t tsf_low;
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} __packed __attribute__((aligned(4)));
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/* Rx descriptor for PCIe devices. */
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struct rtwn_rx_stat_pci {
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uint32_t rxdw0;
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uint32_t rxdw1;
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uint32_t rxdw2;
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uint32_t rxdw3;
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uint32_t rxdw4;
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uint32_t tsf_low;
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uint32_t rxbufaddr;
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uint32_t rxbufaddr64;
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} __packed __attribute__((aligned(4)));
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/*
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* Macros to access subfields in registers.
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*/
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/* Mask and Shift (getter). */
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#define MS(val, field) \
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(((val) & field##_M) >> field##_S)
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/* Shift and Mask (setter). */
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#define SM(field, val) \
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(((val) << field##_S) & field##_M)
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/* Rewrite. */
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#define RW(var, field, val) \
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(((var) & ~field##_M) | SM(field, val))
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#define RTWN_MAX_CONDITIONS 3
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/*
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* Structure for MAC initialization values.
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*/
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struct rtwn_mac_prog {
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uint16_t reg;
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uint8_t val;
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};
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/*
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* Structure for baseband initialization values.
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*/
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struct rtwn_bb_prog {
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int count;
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const uint16_t *reg;
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const uint32_t *val;
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const uint8_t cond[RTWN_MAX_CONDITIONS];
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const struct rtwn_bb_prog *next;
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};
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struct rtwn_agc_prog {
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int count;
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const uint32_t *val;
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const uint8_t cond[RTWN_MAX_CONDITIONS];
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const struct rtwn_agc_prog *next;
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};
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/*
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* Structure for RF initialization values.
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*/
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struct rtwn_rf_prog {
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int count;
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const uint8_t *reg;
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const uint32_t *val;
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const uint8_t cond[RTWN_MAX_CONDITIONS];
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const struct rtwn_rf_prog *next;
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};
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/* XXX move to net80211. */
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static __inline int
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rtwn_chan2centieee(const struct ieee80211_channel *c)
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{
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int chan;
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chan = c->ic_ieee;
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if (c->ic_extieee != 0)
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chan = (chan + c->ic_extieee) / 2;
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return (chan);
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}
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#endif /* IF_RTWNREG_H */
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