260 lines
10 KiB
C
260 lines
10 KiB
C
/******************************************************************************
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*
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* Name: acgcc.h - GCC specific defines, etc.
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* $Revision: 14 $
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*
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*****************************************************************************/
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/******************************************************************************
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*
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* 1. Copyright Notice
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*
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* Some or all of this work - Copyright (c) 1999, 2000, 2001, Intel Corp.
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* All rights reserved.
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*
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* 2. License
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*
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* 2.1. This is your license from Intel Corp. under its intellectual property
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* rights. You may have additional license terms from the party that provided
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* you this software, covering your right to use that party's intellectual
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* property rights.
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*
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* 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
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* copy of the source code appearing in this file ("Covered Code") an
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* irrevocable, perpetual, worldwide license under Intel's copyrights in the
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* base code distributed originally by Intel ("Original Intel Code") to copy,
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* make derivatives, distribute, use and display any portion of the Covered
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* Code in any form, with the right to sublicense such rights; and
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*
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* 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
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* license (with the right to sublicense), under only those claims of Intel
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* patents that are infringed by the Original Intel Code, to make, use, sell,
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* offer to sell, and import the Covered Code and derivative works thereof
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* solely to the minimum extent necessary to exercise the above copyright
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* license, and in no event shall the patent license extend to any additions
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* to or modifications of the Original Intel Code. No other license or right
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* is granted directly or by implication, estoppel or otherwise;
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*
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* The above copyright and patent license is granted only if the following
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* conditions are met:
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*
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* 3. Conditions
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*
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* 3.1. Redistribution of Source with Rights to Further Distribute Source.
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* Redistribution of source code of any substantial portion of the Covered
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* Code or modification with rights to further distribute source must include
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* the above Copyright Notice, the above License, this list of Conditions,
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* and the following Disclaimer and Export Compliance provision. In addition,
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* Licensee must cause all Covered Code to which Licensee contributes to
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* contain a file documenting the changes Licensee made to create that Covered
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* Code and the date of any change. Licensee must include in that file the
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* documentation of any changes made by any predecessor Licensee. Licensee
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* must include a prominent statement that the modification is derived,
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* directly or indirectly, from Original Intel Code.
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*
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* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
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* Redistribution of source code of any substantial portion of the Covered
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* Code or modification without rights to further distribute source must
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* include the following Disclaimer and Export Compliance provision in the
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* documentation and/or other materials provided with distribution. In
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* addition, Licensee may not authorize further sublicense of source of any
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* portion of the Covered Code, and must include terms to the effect that the
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* license from Licensee to its licensee is limited to the intellectual
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* property embodied in the software Licensee provides to its licensee, and
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* not to intellectual property embodied in modifications its licensee may
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* make.
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*
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* 3.3. Redistribution of Executable. Redistribution in executable form of any
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* substantial portion of the Covered Code or modification must reproduce the
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* above Copyright Notice, and the following Disclaimer and Export Compliance
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* provision in the documentation and/or other materials provided with the
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* distribution.
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*
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* 3.4. Intel retains all right, title, and interest in and to the Original
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* Intel Code.
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*
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* 3.5. Neither the name Intel nor any other trademark owned or controlled by
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* Intel shall be used in advertising or otherwise to promote the sale, use or
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* other dealings in products derived from or relating to the Covered Code
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* without prior written authorization from Intel.
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*
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* 4. Disclaimer and Export Compliance
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*
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* 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
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* HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
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* IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
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* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
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* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
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* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
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* PARTICULAR PURPOSE.
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*
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* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
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* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
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* COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
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* SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
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* CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
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* HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
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* SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
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* LIMITED REMEDY.
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*
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* 4.3. Licensee shall not export, either directly or indirectly, any of this
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* software or system incorporating such software without first obtaining any
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* required license or other approval from the U. S. Department of Commerce or
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* any other agency or department of the United States Government. In the
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* event Licensee exports any such software from the United States or
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* re-exports any such software from a foreign destination, Licensee shall
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* ensure that the distribution and export/re-export of the software is in
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* compliance with all laws, regulations, orders, or other restrictions of the
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* U.S. Export Administration Regulations. Licensee agrees that neither it nor
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* any of its subsidiaries will export/re-export any technical data, process,
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* software, or service, directly or indirectly, to any country for which the
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* United States government or any agency thereof requires an export license,
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* other governmental approval, or letter of assurance, without first obtaining
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* such license, approval or letter.
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*
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*****************************************************************************/
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#ifndef __ACGCC_H__
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#define __ACGCC_H__
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#ifdef __ia64__
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#define _IA64
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#define COMPILER_DEPENDENT_UINT64 unsigned long
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/* Single threaded */
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#define ACPI_APPLICATION
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#define ACPI_ASM_MACROS
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#define causeinterrupt(level)
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#define BREAKPOINT3
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#define disable() __cli()
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#define enable() __sti()
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/*! [Begin] no source code translation */
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#include <asm/pal.h>
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#define halt() ia64_pal_halt_light() /* PAL_HALT[_LIGHT] */
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#define safe_halt() ia64_pal_halt(1) /* PAL_HALT */
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#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \
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do { \
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__asm__ volatile ("1: ld4 r29=%1\n" \
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";;\n" \
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"mov ar.ccv=r29\n" \
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"mov r2=r29\n" \
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"shr.u r30=r29,1\n" \
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"and r29=-4,r29\n" \
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";;\n" \
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"add r29=2,r29\n" \
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"and r30=1,r30\n" \
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";;\n" \
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"add r29=r29,r30\n" \
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";;\n" \
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"cmpxchg4.acq r30=%1,r29,ar.ccv\n" \
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";;\n" \
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"cmp.eq p6,p7=r2,r30\n" \
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"(p7) br.dpnt.few 1b\n" \
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"cmp.gt p8,p9=3,r29\n" \
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";;\n" \
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"(p8) mov %0=-1\n" \
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"(p9) mov %0=r0\n" \
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:"=r"(Acq):"m"(GLptr):"r2","r29","r30","memory"); \
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} while (0)
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#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) \
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do { \
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__asm__ volatile ("1: ld4 r29=%1\n" \
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";;\n" \
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"mov ar.ccv=r29\n" \
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"mov r2=r29\n" \
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"and r29=-4,r29\n" \
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";;\n" \
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"cmpxchg4.acq r30=%1,r29,ar.ccv\n" \
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";;\n" \
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"cmp.eq p6,p7=r2,r30\n" \
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"(p7) br.dpnt.few 1b\n" \
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"and %0=1,r2\n" \
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";;\n" \
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:"=r"(Acq):"m"(GLptr):"r2","r29","r30","memory"); \
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} while (0)
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/*! [End] no source code translation !*/
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#else /* DO IA32 */
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#define COMPILER_DEPENDENT_UINT64 unsigned long long
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#define ACPI_ASM_MACROS
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#define causeinterrupt(level)
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#define BREAKPOINT3
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#define disable() __cli()
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#define enable() __sti()
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#define halt() __asm__ __volatile__ ("sti; hlt":::"memory")
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/*! [Begin] no source code translation
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*
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* A brief explanation as GNU inline assembly is a bit hairy
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* %0 is the output parameter in EAX ("=a")
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* %1 and %2 are the input parameters in ECX ("c")
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* and an immediate value ("i") respectively
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* All actual register references are preceded with "%%" as in "%%edx"
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* Immediate values in the assembly are preceded by "$" as in "$0x1"
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* The final asm parameter are the operation altered non-output registers.
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*/
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#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \
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do { \
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int dummy; \
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asm("1: movl (%1),%%eax;" \
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"movl %%eax,%%edx;" \
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"andl %2,%%edx;" \
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"btsl $0x1,%%edx;" \
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"adcl $0x0,%%edx;" \
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"lock; cmpxchgl %%edx,(%1);" \
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"jnz 1b;" \
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"cmpb $0x3,%%dl;" \
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"sbbl %%eax,%%eax" \
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:"=a"(Acq),"=c"(dummy):"c"(GLptr),"i"(~1L):"dx"); \
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} while(0)
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#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) \
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do { \
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int dummy; \
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asm("1: movl (%1),%%eax;" \
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"movl %%eax,%%edx;" \
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"andl %2,%%edx;" \
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"lock; cmpxchgl %%edx,(%1);" \
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"jnz 1b;" \
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"andl $0x1,%%eax" \
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:"=a"(Acq),"=c"(dummy):"c"(GLptr),"i"(~3L):"dx"); \
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} while(0)
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/*
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* Math helper asm macros
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*/
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#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
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asm("divl %2;" \
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:"=a"(q32), "=d"(r32) \
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:"r"(d32), \
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"0"(n_lo), "1"(n_hi))
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#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
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asm("shrl $1,%2;" \
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"rcrl $1,%3;" \
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:"=r"(n_hi), "=r"(n_lo) \
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:"0"(n_hi), "1"(n_lo))
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/*! [End] no source code translation !*/
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#endif /* IA 32 */
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/* This macro is used to tag functions as "printf-like" because
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* some compilers (like GCC) can catch printf format string problems.
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*/
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#define ACPI_PRINTF_LIKE_FUNC __attribute__ ((__format__ (__printf__, 4, 5)))
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#endif /* __ACGCC_H__ */
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