freebsd-nq/sys/amd64/include
Konstantin Belousov 0a110d5b17 Use VT-d interrupt remapping block (IR) to perform FSB messages
translation.  In particular, despite IO-APICs only take 8bit apic id,
IR translation structures accept 32bit APIC Id, which allows x2APIC
mode to function properly.  Extend msi_cpu of struct msi_intrsrc and
io_cpu of ioapic_intsrc to full int from one byte.

KPI of IR is isolated into the x86/iommu/iommu_intrmap.h, to avoid
bringing all dmar headers into interrupt code. The non-PCI(e) devices
which generate message interrupts on FSB require special handling. The
HPET FSB interrupts are remapped, while DMAR interrupts are not.

For each msi and ioapic interrupt source, the iommu cookie is added,
which is in fact index of the IRE (interrupt remap entry) in the IR
table. Cookie is made at the source allocation time, and then used at
the map time to fill both IRE and device registers. The MSI
address/data registers and IO-APIC redirection registers are
programmed with the special values which are recognized by IR and used
to restore the IRE index, to find proper delivery mode and target.
Map all MSI interrupts in the block when msi_map() is called.

Since an interrupt source setup and dismantle code are done in the
non-sleepable context, flushing interrupt entries cache in the IR
hardware, which is done async and ideally waits for the interrupt,
requires busy-wait for queue to drain.  The dmar_qi_wait_for_seq() is
modified to take a boolean argument requesting busy-wait for the
written sequence number instead of waiting for interrupt.

Some interrupts are configured before IR is initialized, e.g. ACPI
SCI.  Add intr_reprogram() function to reprogram all already
configured interrupts, and call it immediately before an IR unit is
enabled.  There is still a small window after the IO-APIC redirection
entry is reprogrammed with cookie but before the unit is enabled, but
to fix this properly, IR must be started much earlier.

Add workarounds for 5500 and X58 northbridges, some revisions of which
have severe flaws in handling IR.  Use the same identification methods
as employed by Linux.

Review:	https://reviews.freebsd.org/D1892
Reviewed by:	neel
Discussed with:	jhb
Tested by:	glebius, pho (previous versions)
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2015-03-19 13:57:47 +00:00
..
pc - Add a new structure type for the ACPI 3.0 SMAP entry that includes the 2014-08-29 21:25:47 +00:00
xen xen: implement the privcmd user-space device 2014-10-22 17:07:20 +00:00
_align.h
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
acpica_machdep.h Merge acpica_machdep.h for amd64 and i386 and move to x86. In fact, these 2013-08-13 22:05:10 +00:00
apm_bios.h
asm.h Revert r274772: it is not valid on MIPS 2014-11-25 03:50:31 +00:00
asmacros.h Extend earlier addition of stack frames to most of support.S. This makes 2014-11-13 22:11:44 +00:00
atomic.h Remove empty lines before return statements for style consistency. 2013-08-21 22:05:58 +00:00
bus_dma.h
bus.h
clock.h xen: implement an early timer for Xen PVH 2014-03-11 10:20:42 +00:00
counter.h Fix issues with zeroing and fetching the counters, on x86 and ppc64. 2013-07-01 02:48:27 +00:00
cpu.h amd64/i386: introduce APIC hooks for different APIC implementations. 2014-06-16 08:43:03 +00:00
cpufunc.h Add x2APIC support. Enable it by default if CPU is capable. The 2015-02-09 21:00:56 +00:00
cputypes.h
db_machdep.h
dump.h Factor out duplicated code from dumpsys() on each architecture into generic 2015-01-07 01:01:39 +00:00
elf.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
endian.h
exec.h
fdt.h Add basic support for FDT to i386 & amd64. This change includes: 2013-05-21 03:05:49 +00:00
float.h
floatingpoint.h
fpu.h Create a separate structure for per-CPU state saved across suspend and 2014-09-06 15:23:28 +00:00
frame.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
gdb_machdep.h
ieeefp.h
in_cksum.h MFp4 bz_ipv6_fast: 2012-05-24 22:00:48 +00:00
intr_machdep.h Use VT-d interrupt remapping block (IR) to perform FSB messages 2015-03-19 13:57:47 +00:00
iodev.h
kdb.h
limits.h
md_var.h For x86, read MAXPHYADDR, defined in SDM vol 3 4.1.4 Enumeration of Paging 2015-01-12 07:36:25 +00:00
memdev.h
metadata.h loader: implement multiboot support for Xen Dom0 2015-01-15 16:27:20 +00:00
minidump.h
mp_watchdog.h
nexusvar.h
npx.h
ofw_machdep.h Add basic support for FDT to i386 & amd64. This change includes: 2013-05-21 03:05:49 +00:00
param.h Bump MAXCPU on amd64 from 64 to 256. In practice APIC only permits 255 2014-08-20 16:06:24 +00:00
pcb.h Create a separate structure for per-CPU state saved across suspend and 2014-09-06 15:23:28 +00:00
pci_cfgreg.h
pcpu.h Formalize the concept of virtual CPU ids by adding a per-cpu vcpu_id 2013-10-05 23:11:01 +00:00
pmap.h amd64: make uiomove_fromphys functional for pages not mapped by the DMAP 2014-10-24 09:48:58 +00:00
pmc_mdep.h
ppireg.h
proc.h
profile.h
psl.h
ptrace.h
pvclock.h Generalized parts of the XEN timer code into a generic pvclock 2015-02-04 08:26:43 +00:00
reg.h
reloc.h
resource.h Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge 2014-02-12 04:30:37 +00:00
runq.h
segments.h Hide struct pcb definition by #ifdef __amd64__ braces. If cc -m32 2013-11-26 19:38:42 +00:00
setjmp.h
sf_buf.h Merge all MD sf_buf allocators into one MI, residing in kern/subr_sfbuf.c 2014-08-05 09:44:10 +00:00
sigframe.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
signal.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
smp.h Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve when 2015-03-14 02:32:08 +00:00
specialreg.h
stack.h
stdarg.h
sysarch.h
timerreg.h
trap.h
tss.h
ucontext.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
varargs.h
vdso.h Implement mechanism to export some kernel timekeeping data to 2012-06-22 07:06:40 +00:00
vm.h
vmm_dev.h Simplify instruction restart logic in bhyve. 2015-01-18 03:08:30 +00:00
vmm_instruction_emul.h AMD processors that have the SVM decode assist capability will store the 2014-09-13 22:16:40 +00:00
vmm.h MOVS instruction emulation. 2015-01-19 06:53:31 +00:00
vmparam.h Revert r276600: PHYS_TO_DMAP_RAW() and DMAP_TO_PHYS_RAW() are no 2015-01-12 07:50:55 +00:00