449 lines
14 KiB
C
449 lines
14 KiB
C
/* tc-i386.h -- Header file for tc-i386.c
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Copyright (C) 1989, 92, 93, 94, 95, 96, 97, 1998 Free Software Foundation.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#ifndef TC_I386
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#define TC_I386 1
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#ifdef ANSI_PROTOTYPES
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struct fix;
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#endif
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#define TARGET_BYTES_BIG_ENDIAN 0
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#ifdef TE_LYNX
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#define TARGET_FORMAT "coff-i386-lynx"
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#endif
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#ifdef BFD_ASSEMBLER
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/* This is used to determine relocation types in tc-i386.c. The first
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parameter is the current relocation type, the second one is the desired
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type. The idea is that if the original type is already some kind of PIC
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relocation, we leave it alone, otherwise we give it the desired type */
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#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
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(X) != BFD_RELOC_386_GOTOFF && \
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(X) != BFD_RELOC_386_GOT32 && \
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(X) != BFD_RELOC_386_GOTPC) ? Y : X)
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#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
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extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
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/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
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* It comes up in complicated expressions such as
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* _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
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* the regular expressions. The fixup specified here when used at runtime
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* implies that we should add the address of the GOT to the specified location,
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* and as a result we have simplified the expression into something we can use.
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*/
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#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
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/* This expression evaluates to false if the relocation is for a local object
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for which we still want to do the relocation at runtime. True if we
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are willing to perform this relocation while building the .o file.
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This is only used for pcrel relocations, so GOTOFF does not need to be
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checked here. I am not sure if some of the others are ever used with
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pcrel, but it is easier to be safe than sorry. */
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#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
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((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
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&& (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
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&& (FIX)->fx_r_type != BFD_RELOC_386_GOTPC)
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#define TARGET_ARCH bfd_arch_i386
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#ifdef OBJ_AOUT
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#ifdef TE_FreeBSD
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#define TARGET_FORMAT "a.out-i386-freebsd"
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#endif
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#ifdef TE_NetBSD
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#define TARGET_FORMAT "a.out-i386-netbsd"
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#endif
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#ifdef TE_386BSD
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#define TARGET_FORMAT "a.out-i386-bsd"
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#endif
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#ifdef TE_LINUX
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#define TARGET_FORMAT "a.out-i386-linux"
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#endif
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#ifdef TE_Mach
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#define TARGET_FORMAT "a.out-mach3"
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#endif
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#ifdef TE_DYNIX
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#define TARGET_FORMAT "a.out-i386-dynix"
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#endif
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#ifndef TARGET_FORMAT
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#define TARGET_FORMAT "a.out-i386"
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#endif
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#endif /* OBJ_AOUT */
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#ifdef OBJ_ELF
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#define TARGET_FORMAT "elf32-i386"
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#endif
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#ifdef OBJ_MAYBE_ELF
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#ifdef OBJ_MAYBE_COFF
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extern const char *i386_target_format PARAMS ((void));
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#define TARGET_FORMAT i386_target_format ()
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#endif
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#endif
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#else /* ! BFD_ASSEMBLER */
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/* COFF STUFF */
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#define COFF_MAGIC I386MAGIC
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#define BFD_ARCH bfd_arch_i386
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#define COFF_FLAGS F_AR32WR
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#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
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#define TC_FORCE_RELOCATION(x) ((x)->fx_r_type==7)
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#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
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extern short tc_coff_fix2rtype PARAMS ((struct fix *));
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#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
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extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
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#define SUB_SEGMENT_ALIGN(SEG) 2
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#define TC_RVA_RELOC 7
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/* Need this for PIC relocations */
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#define NEED_FX_R_TYPE
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#ifdef TE_386BSD
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/* The BSDI linker apparently rejects objects with a machine type of
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M_386 (100). */
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#define AOUT_MACHTYPE 0
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#else
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#define AOUT_MACHTYPE 100
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#endif
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#undef REVERSE_SORT_RELOCS
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#endif /* ! BFD_ASSEMBLER */
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#ifdef BFD_ASSEMBLER
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#define NO_RELOC BFD_RELOC_NONE
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#else
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#define NO_RELOC 0
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#endif
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#define tc_coff_symbol_emit_hook(a) ; /* not used */
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#ifndef BFD_ASSEMBLER
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#ifndef OBJ_AOUT
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#ifndef TE_PE
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/* Local labels starts with .L */
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#define LOCAL_LABEL(name) (name[0] == '.' \
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&& (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
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#endif
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#endif
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#endif
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#define LOCAL_LABELS_FB 1
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#define tc_aout_pre_write_hook(x) {;} /* not used */
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#define tc_crawl_symbol_chain(a) {;} /* not used */
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#define tc_headers_hook(a) {;} /* not used */
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#define MAX_OPERANDS 3 /* max operands per insn */
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#define MAX_PREFIXES 5 /* max prefixes per opcode */
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#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
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#define MAX_MEMORY_OPERANDS 2 /* max memory ref per insn (lcall uses 2) */
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/* we define the syntax here (modulo base,index,scale syntax) */
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#define REGISTER_PREFIX '%'
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#define IMMEDIATE_PREFIX '$'
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#define ABSOLUTE_PREFIX '*'
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#define PREFIX_SEPERATOR '/'
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#define TWO_BYTE_OPCODE_ESCAPE 0x0f
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#define NOP_OPCODE (char) 0x90
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/* register numbers */
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#define EBP_REG_NUM 5
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#define ESP_REG_NUM 4
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/* modrm_byte.regmem for twobyte escape */
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#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
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/* index_base_byte.index for no index register addressing */
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#define NO_INDEX_REGISTER ESP_REG_NUM
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/* index_base_byte.base for no base register addressing */
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#define NO_BASE_REGISTER EBP_REG_NUM
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/* these are the att as opcode suffixes, making movl --> mov, for example */
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#define DWORD_OPCODE_SUFFIX 'l'
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#define WORD_OPCODE_SUFFIX 'w'
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#define BYTE_OPCODE_SUFFIX 'b'
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/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
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#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
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#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
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#define END_OF_INSN '\0'
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/*
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When an operand is read in it is classified by its type. This type includes
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all the possible ways an operand can be used. Thus, '%eax' is both 'register
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# 0' and 'The Accumulator'. In our language this is expressed by OR'ing
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'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
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Operands are classified so that we can match given operand types with
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the opcode table in i386-opcode.h.
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*/
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#define Unknown 0x0
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/* register */
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#define Reg8 0x1 /* 8 bit reg */
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#define Reg16 0x2 /* 16 bit reg */
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#define Reg32 0x4 /* 32 bit reg */
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#define Reg (Reg8|Reg16|Reg32) /* gen'l register */
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#define WordReg (Reg16|Reg32) /* for push/pop operands */
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/* immediate */
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#define Imm8 0x8 /* 8 bit immediate */
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#define Imm8S 0x10 /* 8 bit immediate sign extended */
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#define Imm16 0x20 /* 16 bit immediate */
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#define Imm32 0x40 /* 32 bit immediate */
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#define Imm1 0x80 /* 1 bit immediate */
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#define ImmUnknown Imm32 /* for unknown expressions */
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#define Imm (Imm8|Imm8S|Imm16|Imm32) /* gen'l immediate */
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/* memory */
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#define Disp8 0x200 /* 8 bit displacement (for jumps) */
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#define Disp16 0x400 /* 16 bit displacement */
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#define Disp32 0x800 /* 32 bit displacement */
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#define Disp (Disp8|Disp16|Disp32) /* General displacement */
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#define DispUnknown Disp32 /* for unknown size displacements */
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#define Mem8 0x1000
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#define Mem16 0x2000
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#define Mem32 0x4000
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#define BaseIndex 0x8000
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#define Mem (Disp|Mem8|Mem16|Mem32|BaseIndex) /* General memory */
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#define WordMem (Mem16|Mem32|Disp|BaseIndex)
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#define ByteMem (Mem8|Disp|BaseIndex)
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/* specials */
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#define InOutPortReg 0x10000 /* register to hold in/out port addr = dx */
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#define ShiftCount 0x20000 /* register to hold shift cound = cl */
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#define Control 0x40000 /* Control register */
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#define Debug 0x80000 /* Debug register */
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#define Test 0x100000 /* Test register */
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#define FloatReg 0x200000 /* Float register */
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#define FloatAcc 0x400000 /* Float stack top %st(0) */
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#define SReg2 0x800000 /* 2 bit segment register */
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#define SReg3 0x1000000 /* 3 bit segment register */
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#define Acc 0x2000000 /* Accumulator %al or %ax or %eax */
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#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
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#define JumpAbsolute 0x4000000
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#define Abs8 0x08000000
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#define Abs16 0x10000000
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#define Abs32 0x20000000
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#define Abs (Abs8|Abs16|Abs32)
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#define RegMMX 0x40000000 /* MMX register */
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#define Byte (Reg8|Imm8|Imm8S)
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#define Word (Reg16|Imm16)
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#define DWord (Reg32|Imm32)
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#define SMALLEST_DISP_TYPE(num) \
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fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
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typedef struct
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{
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/* instruction name sans width suffix ("mov" for movl insns) */
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char *name;
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/* how many operands */
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unsigned int operands;
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/* base_opcode is the fundamental opcode byte with a optional prefix(es). */
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unsigned int base_opcode;
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/* extension_opcode is the 3 bit extension for group <n> insns.
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If this template has no extension opcode (the usual case) use None */
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unsigned char extension_opcode;
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#define None 0xff /* If no extension_opcode is possible. */
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/* the bits in opcode_modifier are used to generate the final opcode from
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the base_opcode. These bits also are used to detect alternate forms of
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the same instruction */
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unsigned int opcode_modifier;
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/* opcode_modifier bits: */
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#define W 0x1 /* set if operands are words or dwords */
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#define D 0x2 /* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
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/* direction flag for floating insns: MUST BE 0x400 */
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#define FloatD 0x400
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/* shorthand */
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#define DW (D|W)
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#define ShortForm 0x10 /* register is in low 3 bits of opcode */
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#define ShortFormW 0x20 /* ShortForm and W bit is 0x8 */
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#define Seg2ShortForm 0x40 /* encoding of load segment reg insns */
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#define Seg3ShortForm 0x80 /* fs/gs segment register insns. */
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#define Jump 0x100 /* special case for jump insns. */
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#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
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/* 0x400 CANNOT BE USED since it's already used by FloatD above */
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#define DONT_USE 0x400
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#define NoModrm 0x800
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#define Modrm 0x1000
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#define imulKludge 0x2000
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#define JumpByte 0x4000
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#define JumpDword 0x8000
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#define ReverseRegRegmem 0x10000
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#define Data16 0x20000 /* needs data prefix if in 32-bit mode */
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#define Data32 0x40000 /* needs data prefix if in 16-bit mode */
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#define iclrKludge 0x80000 /* used to convert clr to xor */
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#define FWait 0x100000 /* instruction needs FWAIT */
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/* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
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instuction comes in byte, word, and dword sizes and is encoded into
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machine code in the canonical way. */
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#define COMES_IN_ALL_SIZES (W)
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/* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
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source and destination operands can be reversed by setting either
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the D (for integer insns) or the FloatD (for floating insns) bit
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in base_opcode. */
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#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
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/* operand_types[i] describes the type of operand i. This is made
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by OR'ing together all of the possible type masks. (e.g.
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'operand_types[i] = Reg|Imm' specifies that operand i can be
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either a register or an immediate operand */
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unsigned int operand_types[3];
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}
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template;
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/*
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'templates' is for grouping together 'template' structures for opcodes
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of the same name. This is only used for storing the insns in the grand
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ole hash table of insns.
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The templates themselves start at START and range up to (but not including)
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END.
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*/
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typedef struct
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{
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template *start;
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template *end;
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} templates;
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/* these are for register name --> number & type hash lookup */
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typedef struct
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{
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char *reg_name;
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unsigned int reg_type;
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unsigned int reg_num;
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}
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reg_entry;
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typedef struct
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{
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char *seg_name;
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unsigned int seg_prefix;
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}
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seg_entry;
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/* these are for prefix name --> prefix code hash lookup */
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typedef struct
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{
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char *prefix_name;
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unsigned char prefix_code;
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}
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prefix_entry;
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/* 386 operand encoding bytes: see 386 book for details of this. */
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typedef struct
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{
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unsigned regmem:3; /* codes register or memory operand */
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unsigned reg:3; /* codes register operand (or extended opcode) */
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unsigned mode:2; /* how to interpret regmem & reg */
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}
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modrm_byte;
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/* 386 opcode byte to code indirect addressing. */
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typedef struct
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{
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unsigned base:3;
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unsigned index:3;
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unsigned scale:2;
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}
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base_index_byte;
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/* The name of the global offset table generated by the compiler. Allow
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this to be overridden if need be. */
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#ifndef GLOBAL_OFFSET_TABLE_NAME
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#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
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#endif
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#ifdef BFD_ASSEMBLER
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void i386_validate_fix PARAMS ((struct fix *));
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#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
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#endif
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#endif /* TC_I386 */
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#define md_operand(x)
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extern const struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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extern int flag_16bit_code;
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#ifdef BFD_ASSEMBLER
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#define md_maybe_text() \
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((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
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#else
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#define md_maybe_text() \
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(now_seg != data_section && now_seg != bss_section)
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#endif
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#define md_do_align(n, fill, len, max, around) \
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if ((n) && !need_pass_2 \
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&& (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \
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&& md_maybe_text ()) \
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{ \
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char *p; \
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p = frag_var (rs_align_code, 15, 1, (relax_substateT) max, \
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(symbolS *) 0, (offsetT) (n), (char *) 0); \
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*p = 0x90; \
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goto around; \
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}
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extern void i386_align_code PARAMS ((fragS *, int));
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#define HANDLE_ALIGN(fragP) \
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if (fragP->fr_type == rs_align_code) \
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i386_align_code (fragP, (fragP->fr_next->fr_address \
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- fragP->fr_address \
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- fragP->fr_fix));
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/* call md_apply_fix3 with segment instead of md_apply_fix */
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#define MD_APPLY_FIX3
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void i386_print_statistics PARAMS ((FILE *));
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#define tc_print_statistics i386_print_statistics
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#define md_number_to_chars number_to_chars_littleendian
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#ifdef SCO_ELF
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#define tc_init_after_args() sco_id ()
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extern void sco_id PARAMS ((void));
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#endif
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#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
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/* end of tc-i386.h */
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