0d2a298904
- This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
409 lines
13 KiB
C
409 lines
13 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and multiple processors.
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*
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* atomic_set_char(P, V) (*(u_char*)(P) |= (V))
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* atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
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* atomic_add_char(P, V) (*(u_char*)(P) += (V))
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* atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
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*
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* atomic_set_short(P, V) (*(u_short*)(P) |= (V))
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* atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
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* atomic_add_short(P, V) (*(u_short*)(P) += (V))
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* atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
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*
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* atomic_set_int(P, V) (*(u_int*)(P) |= (V))
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* atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
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* atomic_add_int(P, V) (*(u_int*)(P) += (V))
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* atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
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* atomic_readandclear_int(P) (return *(u_int*)P; *(u_int*)P = 0;)
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*
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* atomic_set_long(P, V) (*(u_long*)(P) |= (V))
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* atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
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* atomic_add_long(P, V) (*(u_long*)(P) += (V))
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* atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
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* atomic_readandclear_long(P) (return *(u_long*)P; *(u_long*)P = 0;)
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*/
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/*
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* The above functions are expanded inline in the statically-linked
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* kernel. Lock prefixes are generated if an SMP kernel is being
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* built.
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*
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* Kernel modules call real functions which are built into the kernel.
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* This allows kernel modules to be portable between UP and SMP systems.
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*/
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#if defined(KLD_MODULE)
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
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int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src);
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
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void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#else /* !KLD_MODULE */
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#ifdef __GNUC__
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/*
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* For userland, assume the SMP case and use lock prefixes so that
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* the binaries will run on both types of systems.
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*/
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#if defined(SMP) || !defined(_KERNEL)
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#define MPLOCKED lock ;
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#else
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#define MPLOCKED
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#endif
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/*
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* The assembly is volatilized to demark potential before-and-after side
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* effects if an interrupt or SMP collision were to occur.
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*/
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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static __inline void \
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atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile(__XSTRING(MPLOCKED) OP \
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: "+m" (*p) \
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: CONS (V)); \
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}
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#else /* !__GNUC__ */
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#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
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extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#endif /* __GNUC__ */
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/*
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* Atomic compare and set, used by the mutex functions
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*
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* if (*dst == exp) *dst = src (all 32 bit words)
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*
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* Returns 0 on failure, non-zero on success
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*/
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#if defined(__GNUC__)
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static __inline int
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atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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{
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int res = exp;
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__asm __volatile (
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" " __XSTRING(MPLOCKED) " "
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" cmpxchgl %1,%2 ; "
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" setz %%al ; "
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" movzbl %%al,%0 ; "
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"1: "
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"# atomic_cmpset_int"
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: "+a" (res) /* 0 (result) */
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: "r" (src), /* 1 */
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"m" (*(dst)) /* 2 */
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: "memory");
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return (res);
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}
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static __inline int
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atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src)
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{
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long res = exp;
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__asm __volatile (
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" " __XSTRING(MPLOCKED) " "
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" cmpxchgq %1,%2 ; "
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" setz %%al ; "
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" movzbq %%al,%0 ; "
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"1: "
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"# atomic_cmpset_long"
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: "+a" (res) /* 0 (result) %rax, XXX check */
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: "r" (src), /* 1 */
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"m" (*(dst)) /* 2 */
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: "memory");
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return (res);
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}
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#endif /* defined(__GNUC__) */
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#if defined(__GNUC__)
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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u_##TYPE res; \
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\
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__asm __volatile(__XSTRING(MPLOCKED) LOP \
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: "=a" (res), /* 0 (result) */\
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"+m" (*p) /* 1 */ \
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: : "memory"); \
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\
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return (res); \
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} \
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\
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/* \
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* The XCHG instruction asserts LOCK automagically. \
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*/ \
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile(SOP \
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: "+m" (*p), /* 0 */ \
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"+r" (v) /* 1 */ \
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: : "memory"); \
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}
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#else /* !defined(__GNUC__) */
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extern int atomic_cmpset_int(volatile u_int *, u_int, u_int);
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extern int atomic_cmpset_long(volatile u_long *, u_long, u_long);
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#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
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extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
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extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
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#endif /* defined(__GNUC__) */
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#endif /* KLD_MODULE */
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ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
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ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
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ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
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ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
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ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
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ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
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ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
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ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
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ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
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ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
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ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
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ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
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ATOMIC_ASM(set, long, "orq %1,%0", "ir", v);
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ATOMIC_ASM(clear, long, "andq %1,%0", "ir", ~v);
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ATOMIC_ASM(add, long, "addq %1,%0", "ir", v);
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ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v);
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ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
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ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
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ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
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ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0");
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#undef ATOMIC_ASM
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#undef ATOMIC_STORE_LOAD
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#define atomic_set_acq_char atomic_set_char
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#define atomic_set_rel_char atomic_set_char
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#define atomic_clear_acq_char atomic_clear_char
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#define atomic_clear_rel_char atomic_clear_char
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#define atomic_add_acq_char atomic_add_char
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#define atomic_add_rel_char atomic_add_char
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#define atomic_subtract_acq_char atomic_subtract_char
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#define atomic_subtract_rel_char atomic_subtract_char
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#define atomic_set_acq_short atomic_set_short
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#define atomic_set_rel_short atomic_set_short
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#define atomic_clear_acq_short atomic_clear_short
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#define atomic_clear_rel_short atomic_clear_short
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#define atomic_add_acq_short atomic_add_short
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#define atomic_add_rel_short atomic_add_short
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#define atomic_subtract_acq_short atomic_subtract_short
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#define atomic_subtract_rel_short atomic_subtract_short
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#define atomic_set_acq_int atomic_set_int
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#define atomic_set_rel_int atomic_set_int
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#define atomic_clear_acq_int atomic_clear_int
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#define atomic_clear_rel_int atomic_clear_int
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#define atomic_add_acq_int atomic_add_int
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#define atomic_add_rel_int atomic_add_int
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#define atomic_subtract_acq_int atomic_subtract_int
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#define atomic_subtract_rel_int atomic_subtract_int
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#define atomic_cmpset_acq_int atomic_cmpset_int
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#define atomic_cmpset_rel_int atomic_cmpset_int
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#define atomic_set_acq_long atomic_set_long
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#define atomic_set_rel_long atomic_set_long
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#define atomic_clear_acq_long atomic_clear_long
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#define atomic_clear_rel_long atomic_clear_long
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#define atomic_add_acq_long atomic_add_long
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#define atomic_add_rel_long atomic_add_long
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#define atomic_subtract_acq_long atomic_subtract_long
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#define atomic_subtract_rel_long atomic_subtract_long
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#define atomic_cmpset_acq_ptr atomic_cmpset_ptr
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#define atomic_cmpset_rel_ptr atomic_cmpset_ptr
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#define atomic_set_8 atomic_set_char
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#define atomic_set_acq_8 atomic_set_acq_char
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#define atomic_set_rel_8 atomic_set_rel_char
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#define atomic_clear_8 atomic_clear_char
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#define atomic_clear_acq_8 atomic_clear_acq_char
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#define atomic_clear_rel_8 atomic_clear_rel_char
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#define atomic_add_8 atomic_add_char
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#define atomic_add_acq_8 atomic_add_acq_char
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#define atomic_add_rel_8 atomic_add_rel_char
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#define atomic_subtract_8 atomic_subtract_char
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#define atomic_subtract_acq_8 atomic_subtract_acq_char
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#define atomic_subtract_rel_8 atomic_subtract_rel_char
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#define atomic_load_acq_8 atomic_load_acq_char
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#define atomic_store_rel_8 atomic_store_rel_char
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#define atomic_set_16 atomic_set_short
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#define atomic_set_acq_16 atomic_set_acq_short
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#define atomic_set_rel_16 atomic_set_rel_short
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#define atomic_clear_16 atomic_clear_short
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#define atomic_clear_acq_16 atomic_clear_acq_short
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#define atomic_clear_rel_16 atomic_clear_rel_short
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#define atomic_add_16 atomic_add_short
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#define atomic_add_acq_16 atomic_add_acq_short
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#define atomic_add_rel_16 atomic_add_rel_short
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#define atomic_subtract_16 atomic_subtract_short
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#define atomic_subtract_acq_16 atomic_subtract_acq_short
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#define atomic_subtract_rel_16 atomic_subtract_rel_short
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#define atomic_load_acq_16 atomic_load_acq_short
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#define atomic_store_rel_16 atomic_store_rel_short
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#define atomic_set_32 atomic_set_int
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#define atomic_set_acq_32 atomic_set_acq_int
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#define atomic_set_rel_32 atomic_set_rel_int
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#define atomic_clear_32 atomic_clear_int
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#define atomic_clear_acq_32 atomic_clear_acq_int
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#define atomic_clear_rel_32 atomic_clear_rel_int
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#define atomic_add_32 atomic_add_int
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#define atomic_add_acq_32 atomic_add_acq_int
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#define atomic_add_rel_32 atomic_add_rel_int
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#define atomic_subtract_32 atomic_subtract_int
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#define atomic_subtract_acq_32 atomic_subtract_acq_int
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#define atomic_subtract_rel_32 atomic_subtract_rel_int
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#define atomic_load_acq_32 atomic_load_acq_int
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#define atomic_store_rel_32 atomic_store_rel_int
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#define atomic_cmpset_32 atomic_cmpset_int
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#define atomic_cmpset_acq_32 atomic_cmpset_acq_int
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#define atomic_cmpset_rel_32 atomic_cmpset_rel_int
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#define atomic_readandclear_32 atomic_readandclear_int
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#if !defined(WANT_FUNCTIONS)
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static __inline int
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atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
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{
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return (atomic_cmpset_long((volatile u_long *)dst,
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(u_long)exp, (u_long)src));
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}
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static __inline void *
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atomic_load_acq_ptr(volatile void *p)
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{
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return (void *)atomic_load_acq_long((volatile u_long *)p);
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}
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static __inline void
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atomic_store_rel_ptr(volatile void *p, void *v)
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{
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atomic_store_rel_long((volatile u_long *)p, (u_long)v);
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}
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#define ATOMIC_PTR(NAME) \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_long((volatile u_long *)p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_acq_long((volatile u_long *)p, v);\
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_rel_long((volatile u_long *)p, v);\
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}
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ATOMIC_PTR(set)
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ATOMIC_PTR(clear)
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ATOMIC_PTR(add)
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ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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#if defined(__GNUC__)
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr)
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{
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u_int result;
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__asm __volatile (
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" xorl %0,%0 ; "
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" xchgl %1,%0 ; "
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"# atomic_readandclear_int"
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: "=&r" (result) /* 0 (result) */
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: "m" (*addr)); /* 1 (addr) */
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return (result);
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}
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr)
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{
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u_long result;
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__asm __volatile (
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" xorq %0,%0 ; "
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" xchgq %1,%0 ; "
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"# atomic_readandclear_int"
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: "=&r" (result) /* 0 (result) */
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: "m" (*addr)); /* 1 (addr) */
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return (result);
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}
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#else /* !defined(__GNUC__) */
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extern u_long atomic_readandclear_long(volatile u_long *);
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extern u_int atomic_readandclear_int(volatile u_int *);
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#endif /* defined(__GNUC__) */
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#endif /* !defined(WANT_FUNCTIONS) */
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#endif /* ! _MACHINE_ATOMIC_H_ */
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