04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs. XXX Note that with our antediluvian assembler, we can't support some Octeon 2 instructions and fall back to using the old ones instead.
237 lines
8.1 KiB
C
237 lines
8.1 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* This module provides system/board/application information obtained by the bootloader.
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*
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* <hr>$Revision: 52004 $<hr>
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*
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/module.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-spinlock.h>
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#include <asm/octeon/cvmx-sysinfo.h>
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#else
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#include "cvmx.h"
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#include "cvmx-spinlock.h"
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#include "cvmx-sysinfo.h"
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#endif
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/**
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* This structure defines the private state maintained by sysinfo module.
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*
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*/
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#if defined(CVMX_BUILD_FOR_UBOOT) && CONFIG_OCTEON_NAND_STAGE2
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/* For u-boot, put this in the text section so that we can use this in early
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** boot when running from ram(or L2 cache). This is primarily used for NAND
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** access during NAND boot. The 'data_in_text' section is merged with the
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** text section by the linker script to avoid an assembler warning. */
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static struct {
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cvmx_sysinfo_t sysinfo; /**< system information */
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cvmx_spinlock_t lock; /**< mutex spinlock */
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} state __attribute__ ((section (".data_in_text"))) = {
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.lock = CVMX_SPINLOCK_UNLOCKED_INITIALIZER
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};
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#else
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CVMX_SHARED static struct {
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struct cvmx_sysinfo sysinfo; /**< system information */
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cvmx_spinlock_t lock; /**< mutex spinlock */
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} state = {
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.lock = CVMX_SPINLOCK_UNLOCKED_INITIALIZER
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};
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#endif
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#ifdef CVMX_BUILD_FOR_LINUX_USER
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/* Global variable with the processor ID since we can't read it directly */
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CVMX_SHARED uint32_t cvmx_app_init_processor_id;
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#endif
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/* Global variables that define the min/max of the memory region set up for 32 bit userspace access */
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uint64_t linux_mem32_min = 0;
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uint64_t linux_mem32_max = 0;
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uint64_t linux_mem32_wired = 0;
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uint64_t linux_mem32_offset = 0;
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/**
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* This function returns the application information as obtained
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* by the bootloader. This provides the core mask of the cores
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* running the same application image, as well as the physical
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* memory regions available to the core.
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*
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* @return Pointer to the boot information structure
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*
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*/
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struct cvmx_sysinfo *cvmx_sysinfo_get(void)
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{
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return &(state.sysinfo);
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}
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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EXPORT_SYMBOL(cvmx_sysinfo_get);
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#endif
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/**
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* This function is used in non-simple executive environments (such as Linux kernel, u-boot, etc.)
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* to configure the minimal fields that are required to use
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* simple executive files directly.
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*
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* Locking (if required) must be handled outside of this
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* function
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*
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* @param phy_mem_desc_addr
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* Address of the global physical memory descriptor (bootmem
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* descriptor)
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* @param board_type Octeon board type enumeration
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*
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* @param board_rev_major
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* Board major revision
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* @param board_rev_minor
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* Board minor revision
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* @param cpu_clock_hz
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* CPU clock freqency in hertz
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*
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* @return 0: Failure
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* 1: success
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*/
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int cvmx_sysinfo_minimal_initialize(uint64_t phy_mem_desc_addr, uint16_t board_type, uint8_t board_rev_major,
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uint8_t board_rev_minor, uint32_t cpu_clock_hz)
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{
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memset(&(state.sysinfo), 0x0, sizeof(state.sysinfo));
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state.sysinfo.phy_mem_desc_addr = phy_mem_desc_addr;
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state.sysinfo.board_type = board_type;
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state.sysinfo.board_rev_major = board_rev_major;
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state.sysinfo.board_rev_minor = board_rev_minor;
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state.sysinfo.cpu_clock_hz = cpu_clock_hz;
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return(1);
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}
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#ifdef CVMX_BUILD_FOR_LINUX_USER
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/**
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* Initialize the sysinfo structure when running on
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* Octeon under Linux userspace
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*/
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void cvmx_sysinfo_linux_userspace_initialize(void)
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{
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cvmx_sysinfo_t *system_info = cvmx_sysinfo_get();
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memset(system_info, 0, sizeof(cvmx_sysinfo_t));
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system_info->core_mask = 0;
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system_info->init_core = -1;
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FILE *infile = fopen("/proc/octeon_info", "r");
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if (infile == NULL)
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{
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perror("Error opening /proc/octeon_info");
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exit(-1);
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}
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while (!feof(infile))
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{
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char buffer[80];
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if (fgets(buffer, sizeof(buffer), infile))
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{
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const char *field = strtok(buffer, " ");
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const char *valueS = strtok(NULL, " ");
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if (field == NULL)
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continue;
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if (valueS == NULL)
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continue;
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unsigned long long value;
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sscanf(valueS, "%lli", &value);
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if (strcmp(field, "dram_size:") == 0)
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system_info->system_dram_size = value;
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else if (strcmp(field, "phy_mem_desc_addr:") == 0)
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system_info->phy_mem_desc_addr = value;
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else if (strcmp(field, "eclock_hz:") == 0)
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system_info->cpu_clock_hz = value;
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else if (strcmp(field, "dclock_hz:") == 0)
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system_info->dram_data_rate_hz = value * 2;
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else if (strcmp(field, "board_type:") == 0)
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system_info->board_type = value;
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else if (strcmp(field, "board_rev_major:") == 0)
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system_info->board_rev_major = value;
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else if (strcmp(field, "board_rev_minor:") == 0)
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system_info->board_rev_minor = value;
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else if (strcmp(field, "board_serial_number:") == 0)
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strncpy(system_info->board_serial_number, valueS, sizeof(system_info->board_serial_number));
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else if (strcmp(field, "mac_addr_base:") == 0)
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{
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int i;
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int m[6];
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sscanf(valueS, "%02x:%02x:%02x:%02x:%02x:%02x", m+0, m+1, m+2, m+3, m+4, m+5);
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for (i=0; i<6; i++)
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system_info->mac_addr_base[i] = m[i];
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}
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else if (strcmp(field, "mac_addr_count:") == 0)
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system_info->mac_addr_count = value;
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else if (strcmp(field, "32bit_shared_mem_base:") == 0)
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linux_mem32_min = value;
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else if (strcmp(field, "32bit_shared_mem_size:") == 0)
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linux_mem32_max = linux_mem32_min + value - 1;
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else if (strcmp(field, "processor_id:") == 0)
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cvmx_app_init_processor_id = value;
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else if (strcmp(field, "32bit_shared_mem_wired:") == 0)
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linux_mem32_wired = value;
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}
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}
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system_info->cpu_clock_hz = cvmx_clock_get_rate(CVMX_CLOCK_CORE);
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}
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#endif
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