51369649b0
Mainly focus on files that use BSD 3-Clause license. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point.
503 lines
13 KiB
C
503 lines
13 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (C) 2002-2003 NetGroup, Politecnico di Torino (Italy)
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* Copyright (C) 2005-2016 Jung-uk Kim <jkim@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Politecnico di Torino nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _BPF_JIT_MACHDEP_H_
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#define _BPF_JIT_MACHDEP_H_
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/*
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* Registers
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*/
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#define RAX 0
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#define RCX 1
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#define RDX 2
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#define RBX 3
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#define RSP 4
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#define RBP 5
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#define RSI 6
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#define RDI 7
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#define R8 0
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#define R9 1
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#define R10 2
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#define R11 3
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#define R12 4
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#define R13 5
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#define R14 6
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#define R15 7
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#define EAX 0
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#define ECX 1
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#define EDX 2
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#define EBX 3
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#define ESP 4
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#define EBP 5
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#define ESI 6
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#define EDI 7
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#define R8D 0
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#define R9D 1
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#define R10D 2
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#define R11D 3
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#define R12D 4
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#define R13D 5
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#define R14D 6
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#define R15D 7
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#define AX 0
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#define CX 1
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#define DX 2
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#define BX 3
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#define SP 4
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#define BP 5
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#define SI 6
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#define DI 7
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#define AL 0
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#define CL 1
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#define DL 2
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#define BL 3
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/* Optimization flags */
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#define BPF_JIT_FRET 0x01
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#define BPF_JIT_FPKT 0x02
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#define BPF_JIT_FMEM 0x04
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#define BPF_JIT_FJMP 0x08
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#define BPF_JIT_FLEN 0x10
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#define BPF_JIT_FLAG_ALL \
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(BPF_JIT_FPKT | BPF_JIT_FMEM | BPF_JIT_FJMP | BPF_JIT_FLEN)
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/* A stream of native binary code */
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typedef struct bpf_bin_stream {
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/* Current native instruction pointer. */
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int cur_ip;
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/*
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* Current BPF instruction pointer, i.e. position in
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* the BPF program reached by the jitter.
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*/
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int bpf_pc;
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/* Instruction buffer, contains the generated native code. */
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char *ibuf;
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/* Jumps reference table. */
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u_int *refs;
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} bpf_bin_stream;
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/*
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* Prototype of the emit functions.
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*
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* Different emit functions are used to create the reference table and
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* to generate the actual filtering code. This allows to have simpler
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* instruction macros.
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* The first parameter is the stream that will receive the data.
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* The second one is a variable containing the data.
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* The third one is the length, that can be 1, 2, or 4 since it is possible
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* to emit a byte, a short, or a word at a time.
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*/
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typedef void (*emit_func)(bpf_bin_stream *stream, u_int value, u_int n);
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/*
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* Native instruction macros
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*/
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/* movl i32,r32 */
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#define MOVid(i32, r32) do { \
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emitm(&stream, (11 << 4) | (1 << 3) | (r32 & 0x7), 1); \
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emitm(&stream, i32, 4); \
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} while (0)
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/* movq i64,r64 */
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#define MOViq(i64, r64) do { \
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emitm(&stream, 0x48, 1); \
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emitm(&stream, (11 << 4) | (1 << 3) | (r64 & 0x7), 1); \
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emitm(&stream, i64, 4); \
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emitm(&stream, (i64 >> 32), 4); \
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} while (0)
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/* movl sr32,dr32 */
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#define MOVrd(sr32, dr32) do { \
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emitm(&stream, 0x89, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* movl sr32,dr32 (dr32 = %r8-15d) */
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#define MOVrd2(sr32, dr32) do { \
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emitm(&stream, 0x8941, 2); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* movl sr32,dr32 (sr32 = %r8-15d) */
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#define MOVrd3(sr32, dr32) do { \
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emitm(&stream, 0x8944, 2); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* movq sr64,dr64 */
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#define MOVrq(sr64, dr64) do { \
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emitm(&stream, 0x8948, 2); \
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emitm(&stream, \
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(3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
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} while (0)
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/* movq sr64,dr64 (dr64 = %r8-15) */
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#define MOVrq2(sr64, dr64) do { \
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emitm(&stream, 0x8949, 2); \
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emitm(&stream, \
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(3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
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} while (0)
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/* movq sr64,dr64 (sr64 = %r8-15) */
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#define MOVrq3(sr64, dr64) do { \
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emitm(&stream, 0x894c, 2); \
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emitm(&stream, \
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(3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
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} while (0)
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/* movl (sr64,or64,1),dr32 */
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#define MOVobd(sr64, or64, dr32) do { \
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emitm(&stream, 0x8b, 1); \
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emitm(&stream, ((dr32 & 0x7) << 3) | 4, 1); \
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emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
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} while (0)
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/* movw (sr64,or64,1),dr16 */
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#define MOVobw(sr64, or64, dr16) do { \
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emitm(&stream, 0x8b66, 2); \
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emitm(&stream, ((dr16 & 0x7) << 3) | 4, 1); \
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emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
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} while (0)
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/* movb (sr64,or64,1),dr8 */
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#define MOVobb(sr64, or64, dr8) do { \
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emitm(&stream, 0x8a, 1); \
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emitm(&stream, ((dr8 & 0x7) << 3) | 4, 1); \
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emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
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} while (0)
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/* movl sr32,(dr64,or64,1) */
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#define MOVomd(sr32, dr64, or64) do { \
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emitm(&stream, 0x89, 1); \
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emitm(&stream, ((sr32 & 0x7) << 3) | 4, 1); \
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emitm(&stream, ((or64 & 0x7) << 3) | (dr64 & 0x7), 1); \
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} while (0)
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/* bswapl dr32 */
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#define BSWAP(dr32) do { \
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emitm(&stream, 0xf, 1); \
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emitm(&stream, (0x19 << 3) | dr32, 1); \
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} while (0)
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/* xchgb %al,%ah */
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#define SWAP_AX() do { \
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emitm(&stream, 0xc486, 2); \
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} while (0)
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/* pushq r64 */
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#define PUSH(r64) do { \
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emitm(&stream, (5 << 4) | (0 << 3) | (r64 & 0x7), 1); \
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} while (0)
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/* leaveq */
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#define LEAVE() do { \
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emitm(&stream, 0xc9, 1); \
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} while (0)
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/* retq */
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#define RET() do { \
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emitm(&stream, 0xc3, 1); \
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} while (0)
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/* addl sr32,dr32 */
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#define ADDrd(sr32, dr32) do { \
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emitm(&stream, 0x01, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* addl i32,%eax */
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#define ADD_EAXi(i32) do { \
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emitm(&stream, 0x05, 1); \
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emitm(&stream, i32, 4); \
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} while (0)
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/* addl i8,r32 */
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#define ADDib(i8, r32) do { \
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emitm(&stream, 0x83, 1); \
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emitm(&stream, (24 << 3) | r32, 1); \
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emitm(&stream, i8, 1); \
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} while (0)
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/* subl sr32,dr32 */
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#define SUBrd(sr32, dr32) do { \
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emitm(&stream, 0x29, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* subl i32,%eax */
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#define SUB_EAXi(i32) do { \
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emitm(&stream, 0x2d, 1); \
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emitm(&stream, i32, 4); \
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} while (0)
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/* subq i8,r64 */
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#define SUBib(i8, r64) do { \
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emitm(&stream, 0x8348, 2); \
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emitm(&stream, (29 << 3) | (r64 & 0x7), 1); \
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emitm(&stream, i8, 1); \
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} while (0)
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/* mull r32 */
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#define MULrd(r32) do { \
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emitm(&stream, 0xf7, 1); \
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emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
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} while (0)
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/* divl r32 */
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#define DIVrd(r32) do { \
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emitm(&stream, 0xf7, 1); \
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emitm(&stream, (15 << 4) | (r32 & 0x7), 1); \
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} while (0)
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/* andb i8,r8 */
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#define ANDib(i8, r8) do { \
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if (r8 == AL) { \
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emitm(&stream, 0x24, 1); \
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} else { \
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emitm(&stream, 0x80, 1); \
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emitm(&stream, (7 << 5) | r8, 1); \
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} \
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emitm(&stream, i8, 1); \
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} while (0)
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/* andl i32,r32 */
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#define ANDid(i32, r32) do { \
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if (r32 == EAX) { \
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emitm(&stream, 0x25, 1); \
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} else { \
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emitm(&stream, 0x81, 1); \
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emitm(&stream, (7 << 5) | r32, 1); \
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} \
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emitm(&stream, i32, 4); \
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} while (0)
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/* andl sr32,dr32 */
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#define ANDrd(sr32, dr32) do { \
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emitm(&stream, 0x21, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* testl i32,r32 */
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#define TESTid(i32, r32) do { \
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if (r32 == EAX) { \
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emitm(&stream, 0xa9, 1); \
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} else { \
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emitm(&stream, 0xf7, 1); \
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emitm(&stream, (3 << 6) | r32, 1); \
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} \
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emitm(&stream, i32, 4); \
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} while (0)
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/* testl sr32,dr32 */
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#define TESTrd(sr32, dr32) do { \
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emitm(&stream, 0x85, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* orl sr32,dr32 */
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#define ORrd(sr32, dr32) do { \
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emitm(&stream, 0x09, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* orl i32,r32 */
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#define ORid(i32, r32) do { \
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if (r32 == EAX) { \
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emitm(&stream, 0x0d, 1); \
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} else { \
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emitm(&stream, 0x81, 1); \
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emitm(&stream, (25 << 3) | r32, 1); \
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} \
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emitm(&stream, i32, 4); \
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} while (0)
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/* xorl sr32,dr32 */
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#define XORrd(sr32, dr32) do { \
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emitm(&stream, 0x31, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* xorl i32,r32 */
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#define XORid(i32, r32) do { \
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if (r32 == EAX) { \
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emitm(&stream, 0x35, 1); \
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} else { \
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emitm(&stream, 0x81, 1); \
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emitm(&stream, (25 << 3) | r32, 1); \
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} \
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emitm(&stream, i32, 4); \
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} while (0)
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/* shll i8,r32 */
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#define SHLib(i8, r32) do { \
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emitm(&stream, 0xc1, 1); \
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emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
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emitm(&stream, i8, 1); \
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} while (0)
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/* shll %cl,dr32 */
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#define SHL_CLrb(dr32) do { \
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emitm(&stream, 0xd3, 1); \
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emitm(&stream, (7 << 5) | (dr32 & 0x7), 1); \
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} while (0)
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/* shrl i8,r32 */
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#define SHRib(i8, r32) do { \
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emitm(&stream, 0xc1, 1); \
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emitm(&stream, (29 << 3) | (r32 & 0x7), 1); \
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emitm(&stream, i8, 1); \
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} while (0)
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/* shrl %cl,dr32 */
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#define SHR_CLrb(dr32) do { \
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emitm(&stream, 0xd3, 1); \
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emitm(&stream, (29 << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* negl r32 */
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#define NEGd(r32) do { \
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emitm(&stream, 0xf7, 1); \
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emitm(&stream, (27 << 3) | (r32 & 0x7), 1); \
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} while (0)
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/* cmpl sr32,dr32 */
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#define CMPrd(sr32, dr32) do { \
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emitm(&stream, 0x39, 1); \
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emitm(&stream, \
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(3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
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} while (0)
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/* cmpl i32,dr32 */
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#define CMPid(i32, dr32) do { \
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if (dr32 == EAX){ \
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emitm(&stream, 0x3d, 1); \
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emitm(&stream, i32, 4); \
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} else { \
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emitm(&stream, 0x81, 1); \
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emitm(&stream, (0x1f << 3) | (dr32 & 0x7), 1); \
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emitm(&stream, i32, 4); \
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} \
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} while (0)
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/* jb off8 */
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#define JBb(off8) do { \
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emitm(&stream, 0x72, 1); \
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emitm(&stream, off8, 1); \
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} while (0)
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/* jae off8 */
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#define JAEb(off8) do { \
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emitm(&stream, 0x73, 1); \
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emitm(&stream, off8, 1); \
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} while (0)
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/* jne off8 */
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#define JNEb(off8) do { \
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emitm(&stream, 0x75, 1); \
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emitm(&stream, off8, 1); \
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} while (0)
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/* ja off8 */
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#define JAb(off8) do { \
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emitm(&stream, 0x77, 1); \
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emitm(&stream, off8, 1); \
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} while (0)
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/* jmp off32 */
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#define JMP(off32) do { \
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emitm(&stream, 0xe9, 1); \
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emitm(&stream, off32, 4); \
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} while (0)
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/* xorl r32,r32 */
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#define ZEROrd(r32) do { \
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emitm(&stream, 0x31, 1); \
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emitm(&stream, (3 << 6) | ((r32 & 0x7) << 3) | (r32 & 0x7), 1); \
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} while (0)
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/*
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* Conditional long jumps
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*/
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#define JB 0x82
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#define JAE 0x83
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#define JE 0x84
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#define JNE 0x85
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|
#define JBE 0x86
|
|
#define JA 0x87
|
|
|
|
#define JCC(t, f) do { \
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|
if (ins->jt != 0 && ins->jf != 0) { \
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|
/* 5 is the size of the following jmp */ \
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|
emitm(&stream, ((t) << 8) | 0x0f, 2); \
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|
emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
|
|
stream.refs[stream.bpf_pc] + 5, 4); \
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|
JMP(stream.refs[stream.bpf_pc + ins->jf] - \
|
|
stream.refs[stream.bpf_pc]); \
|
|
} else if (ins->jt != 0) { \
|
|
emitm(&stream, ((t) << 8) | 0x0f, 2); \
|
|
emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
|
|
stream.refs[stream.bpf_pc], 4); \
|
|
} else { \
|
|
emitm(&stream, ((f) << 8) | 0x0f, 2); \
|
|
emitm(&stream, stream.refs[stream.bpf_pc + ins->jf] - \
|
|
stream.refs[stream.bpf_pc], 4); \
|
|
} \
|
|
} while (0)
|
|
|
|
#define JUMP(off) do { \
|
|
if ((off) != 0) \
|
|
JMP(stream.refs[stream.bpf_pc + (off)] - \
|
|
stream.refs[stream.bpf_pc]); \
|
|
} while (0)
|
|
|
|
#endif /* _BPF_JIT_MACHDEP_H_ */
|