378f231e7d
required by arches like sparc64 (not yet implemented) and sun4v where there are seperate IOMMU's for each PCI bus... For all other arches, it will end up returning NULL, which makes it a no-op... Convert a few drivers (the ones we've been working w/ on sun4v) to the new convection... Eventually all drivers will need to replace the parent tag of NULL, w/ bus_get_dma_tag(dev), though dev is usually different for each driver, and will require hand inspection... Reviewed by: scottl (earlier version)
413 lines
12 KiB
C
413 lines
12 KiB
C
/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Lennart Augustsson (augustss@carlstedt.se) at
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* Carlstedt Research & Technology.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* USB Open Host Controller driver.
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*
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* OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
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*/
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/* The low level controller code for OHCI has been split into
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* PCI probes and OHCI specific code. This was done to facilitate the
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* sharing of code between *BSD's
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*/
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/queue.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usbdivar.h>
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#include <dev/usb/usb_mem.h>
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#include <dev/usb/ohcireg.h>
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#include <dev/usb/ohcivar.h>
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#define PCI_OHCI_VENDORID_ACERLABS 0x10b9
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#define PCI_OHCI_VENDORID_AMD 0x1022
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#define PCI_OHCI_VENDORID_APPLE 0x106b
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#define PCI_OHCI_VENDORID_ATI 0x1002
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#define PCI_OHCI_VENDORID_CMDTECH 0x1095
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#define PCI_OHCI_VENDORID_NEC 0x1033
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#define PCI_OHCI_VENDORID_NVIDIA 0x12D2
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#define PCI_OHCI_VENDORID_NVIDIA2 0x10DE
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#define PCI_OHCI_VENDORID_OPTI 0x1045
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#define PCI_OHCI_VENDORID_SIS 0x1039
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#define PCI_OHCI_VENDORID_SUN 0x108e
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#define PCI_OHCI_DEVICEID_ALADDIN_V 0x523710b9
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static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
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#define PCI_OHCI_DEVICEID_AMD756 0x740c1022
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static const char *ohci_device_amd756 = "AMD-756 USB Controller";
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#define PCI_OHCI_DEVICEID_AMD766 0x74141022
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static const char *ohci_device_amd766 = "AMD-766 USB Controller";
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#define PCI_OHCI_DEVICEID_SB400_1 0x43741002
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#define PCI_OHCI_DEVICEID_SB400_2 0x43751002
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static const char *ohci_device_sb400 = "ATI SB400 USB Controller";
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#define PCI_OHCI_DEVICEID_FIRELINK 0xc8611045
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static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
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#define PCI_OHCI_DEVICEID_NEC 0x00351033
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static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
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#define PCI_OHCI_DEVICEID_NFORCE3 0x00d710de
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static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
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#define PCI_OHCI_DEVICEID_USB0670 0x06701095
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static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
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#define PCI_OHCI_DEVICEID_USB0673 0x06731095
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static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
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#define PCI_OHCI_DEVICEID_SIS5571 0x70011039
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static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
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#define PCI_OHCI_DEVICEID_KEYLARGO 0x0019106b
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static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
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#define PCI_OHCI_DEVICEID_PCIO2USB 0x1103108e
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static const char *ohci_device_pcio2usb = "Sun PCIO-2 USB controller";
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static const char *ohci_device_generic = "OHCI (generic) USB controller";
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#define PCI_OHCI_BASE_REG 0x10
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static int ohci_pci_attach(device_t self);
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static int ohci_pci_detach(device_t self);
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static int ohci_pci_suspend(device_t self);
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static int ohci_pci_resume(device_t self);
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static int
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ohci_pci_suspend(device_t self)
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{
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ohci_softc_t *sc = device_get_softc(self);
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int err;
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err = bus_generic_suspend(self);
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if (err)
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return err;
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ohci_power(PWR_SUSPEND, sc);
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return 0;
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}
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static int
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ohci_pci_resume(device_t self)
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{
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ohci_softc_t *sc = device_get_softc(self);
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ohci_power(PWR_RESUME, sc);
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bus_generic_resume(self);
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return 0;
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}
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static const char *
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ohci_pci_match(device_t self)
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{
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u_int32_t device_id = pci_get_devid(self);
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switch (device_id) {
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case PCI_OHCI_DEVICEID_ALADDIN_V:
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return (ohci_device_aladdin_v);
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case PCI_OHCI_DEVICEID_AMD756:
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return (ohci_device_amd756);
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case PCI_OHCI_DEVICEID_AMD766:
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return (ohci_device_amd766);
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case PCI_OHCI_DEVICEID_SB400_1:
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case PCI_OHCI_DEVICEID_SB400_2:
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return (ohci_device_sb400);
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case PCI_OHCI_DEVICEID_USB0670:
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return (ohci_device_usb0670);
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case PCI_OHCI_DEVICEID_USB0673:
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return (ohci_device_usb0673);
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case PCI_OHCI_DEVICEID_FIRELINK:
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return (ohci_device_firelink);
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case PCI_OHCI_DEVICEID_NEC:
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return (ohci_device_nec);
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case PCI_OHCI_DEVICEID_NFORCE3:
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return (ohci_device_nforce3);
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case PCI_OHCI_DEVICEID_SIS5571:
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return (ohci_device_sis5571);
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case PCI_OHCI_DEVICEID_KEYLARGO:
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return (ohci_device_keylargo);
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case PCI_OHCI_DEVICEID_PCIO2USB:
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return (ohci_device_pcio2usb);
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default:
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if (pci_get_class(self) == PCIC_SERIALBUS
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&& pci_get_subclass(self) == PCIS_SERIALBUS_USB
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&& pci_get_progif(self) == PCI_INTERFACE_OHCI) {
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return (ohci_device_generic);
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}
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}
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return NULL; /* dunno */
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}
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static int
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ohci_pci_probe(device_t self)
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{
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const char *desc = ohci_pci_match(self);
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if (desc) {
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device_set_desc(self, desc);
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return BUS_PROBE_DEFAULT;
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} else {
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return ENXIO;
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}
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}
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static int
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ohci_pci_attach(device_t self)
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{
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ohci_softc_t *sc = device_get_softc(self);
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int err;
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int rid;
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/* XXX where does it say so in the spec? */
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sc->sc_bus.usbrev = USBREV_1_0;
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pci_enable_busmaster(self);
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/*
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* Some Sun PCIO-2 USB controllers have their intpin register
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* bogusly set to 0, although it should be 4. Correct that.
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*/
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if (pci_get_devid(self) == PCI_OHCI_DEVICEID_PCIO2USB &&
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pci_get_intpin(self) == 0)
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pci_set_intpin(self, 4);
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rid = PCI_CBMEM;
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sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->io_res) {
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device_printf(self, "Could not map memory\n");
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return ENXIO;
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}
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sc->iot = rman_get_bustag(sc->io_res);
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sc->ioh = rman_get_bushandle(sc->io_res);
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->irq_res == NULL) {
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device_printf(self, "Could not allocate irq\n");
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ohci_pci_detach(self);
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return ENXIO;
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}
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sc->sc_bus.bdev = device_add_child(self, "usb", -1);
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if (!sc->sc_bus.bdev) {
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device_printf(self, "Could not add USB device\n");
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ohci_pci_detach(self);
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return ENOMEM;
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}
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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/* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
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device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
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switch (pci_get_vendor(self)) {
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case PCI_OHCI_VENDORID_ACERLABS:
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sprintf(sc->sc_vendor, "AcerLabs");
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break;
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case PCI_OHCI_VENDORID_AMD:
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sprintf(sc->sc_vendor, "AMD");
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break;
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case PCI_OHCI_VENDORID_APPLE:
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sprintf(sc->sc_vendor, "Apple");
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break;
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case PCI_OHCI_VENDORID_ATI:
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sprintf(sc->sc_vendor, "ATI");
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break;
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case PCI_OHCI_VENDORID_CMDTECH:
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sprintf(sc->sc_vendor, "CMDTECH");
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break;
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case PCI_OHCI_VENDORID_NEC:
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sprintf(sc->sc_vendor, "NEC");
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break;
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case PCI_OHCI_VENDORID_NVIDIA:
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case PCI_OHCI_VENDORID_NVIDIA2:
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sprintf(sc->sc_vendor, "nVidia");
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break;
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case PCI_OHCI_VENDORID_OPTI:
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sprintf(sc->sc_vendor, "OPTi");
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break;
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case PCI_OHCI_VENDORID_SIS:
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sprintf(sc->sc_vendor, "SiS");
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break;
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default:
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if (bootverbose)
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device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
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pci_get_devid(self));
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sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
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}
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err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO, ohci_intr, sc,
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&sc->ih);
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if (err) {
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device_printf(self, "Could not setup irq, %d\n", err);
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sc->ih = NULL;
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ohci_pci_detach(self);
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return ENXIO;
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}
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/* Allocate a parent dma tag for DMA maps */
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err = bus_dma_tag_create(bus_get_dma_tag(self), 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
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NULL, NULL, &sc->sc_bus.parent_dmatag);
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if (err) {
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device_printf(self, "Could not allocate parent DMA tag (%d)\n",
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err);
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ohci_pci_detach(self);
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return ENXIO;
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}
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/* Allocate a dma tag for transfer buffers */
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err = bus_dma_tag_create(sc->sc_bus.parent_dmatag, 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
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busdma_lock_mutex, &Giant, &sc->sc_bus.buffer_dmatag);
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if (err) {
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device_printf(self, "Could not allocate transfer tag (%d)\n",
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err);
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ohci_pci_detach(self);
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return ENXIO;
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}
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err = ohci_init(sc);
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if (!err) {
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sc->sc_flags |= OHCI_SCFLG_DONEINIT;
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err = device_probe_and_attach(sc->sc_bus.bdev);
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}
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if (err) {
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device_printf(self, "USB init failed\n");
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ohci_pci_detach(self);
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return EIO;
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}
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return 0;
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}
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static int
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ohci_pci_detach(device_t self)
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{
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ohci_softc_t *sc = device_get_softc(self);
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if (sc->sc_flags & OHCI_SCFLG_DONEINIT) {
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ohci_detach(sc, 0);
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sc->sc_flags &= ~OHCI_SCFLG_DONEINIT;
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}
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if (sc->sc_bus.parent_dmatag != NULL)
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bus_dma_tag_destroy(sc->sc_bus.parent_dmatag);
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if (sc->sc_bus.buffer_dmatag != NULL)
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bus_dma_tag_destroy(sc->sc_bus.buffer_dmatag);
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if (sc->irq_res && sc->ih) {
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int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
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if (err)
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/* XXX or should we panic? */
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device_printf(self, "Could not tear down irq, %d\n",
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err);
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sc->ih = NULL;
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}
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if (sc->sc_bus.bdev) {
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device_delete_child(self, sc->sc_bus.bdev);
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sc->sc_bus.bdev = NULL;
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}
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if (sc->irq_res) {
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bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
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sc->irq_res = NULL;
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}
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if (sc->io_res) {
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bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
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sc->io_res);
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sc->io_res = NULL;
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sc->iot = 0;
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sc->ioh = 0;
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}
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return 0;
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}
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static device_method_t ohci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ohci_pci_probe),
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DEVMETHOD(device_attach, ohci_pci_attach),
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DEVMETHOD(device_detach, ohci_pci_detach),
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DEVMETHOD(device_suspend, ohci_pci_suspend),
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DEVMETHOD(device_resume, ohci_pci_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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{0, 0}
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};
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static driver_t ohci_driver = {
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"ohci",
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ohci_methods,
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sizeof(ohci_softc_t),
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};
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static devclass_t ohci_devclass;
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DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
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DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);
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