430e272c7e
- export the rest of the cpu features (and amd's features). - turn on EFER_NXE, depending on the NX amd feature bit - reorg the identcpu stuff a bit in order to stop treating the amd features as second class features (since it is now a primary feature bit set) and make it easier to export.
237 lines
7.1 KiB
ArmAsm
237 lines
7.1 KiB
ArmAsm
/*-
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* Copyright (c) 2003 Peter Wemm
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asmacros.h> /* miscellaneous asm macros */
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#include <machine/specialreg.h>
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#include "assym.s"
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.data /* So we can modify it */
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.p2align 4,0
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.globl mptramp_start
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mptramp_start:
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.code16
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/*
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* The AP enters here in response to the startup IPI.
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* We are in real mode. %cs is the only segment register set.
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*/
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cli /* make sure no interrupts */
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mov %cs, %ax /* copy %cs to %ds. Remember these */
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mov %ax, %ds /* are offsets rather than selectors */
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mov %ax, %ss
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/*
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* Find relocation base and patch the gdt descript and ljmp targets
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*/
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xorl %ebx,%ebx
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mov %cs, %bx
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sall $4, %ebx /* %ebx is now our relocation base */
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orl %ebx, lgdt_desc-mptramp_start+2
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orl %ebx, jmp_32-mptramp_start+2
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orl %ebx, jmp_64-mptramp_start+1
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/*
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* Load the descriptor table pointer. We'll need it when running
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* in 16 bit protected mode.
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*/
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lgdt lgdt_desc-mptramp_start
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/* Enable protected mode */
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movl $CR0_PE, %eax
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mov %eax, %cr0
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/*
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* Now execute a far jump to turn on protected mode. This
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* causes the segment registers to turn into selectors and causes
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* %cs to be loaded from the gdt.
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*
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* The following instruction is:
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* ljmpl $bootcode-gdt, $protmode-mptramp_start
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* but gas cannot assemble that. And besides, we patch the targets
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* in early startup and its a little clearer what we are patching.
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*/
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jmp_32:
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.byte 0x66 /* size override to 32 bits */
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.byte 0xea /* opcode for far jump */
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.long protmode-mptramp_start /* offset in segment */
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.word bootcode-gdt /* index in gdt for 32 bit code */
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/*
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* At this point, we are running in 32 bit legacy protected mode.
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*/
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.code32
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protmode:
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mov $bootdata-gdt, %eax
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mov %ax, %ds
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/* Turn on the PAE, PSE and PGE bits for when paging is enabled */
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mov %cr4, %eax
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orl $(CR4_PAE | CR4_PSE), %eax
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mov %eax, %cr4
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/*
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* Enable EFER.LME so that we get long mode when all the prereqs are
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* in place. In this case, it turns on when CR0_PG is finally enabled.
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* Pick up a few other EFER bits that we'll use need we're here.
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*/
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movl $MSR_EFER, %ecx
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rdmsr
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orl $EFER_LME | EFER_SCE, %eax
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wrmsr
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/*
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* Point to the embedded page tables for startup. Note that this
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* only gets accessed after we're actually in 64 bit mode, however
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* we can only set the bottom 32 bits of %cr3 in this state. This
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* means we are required to use a temporary page table that is below
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* the 4GB limit. %ebx is still our relocation base. We could just
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* subtract 3 * PAGE_SIZE, but that would be too easy.
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*/
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leal mptramp_pagetables-mptramp_start(%ebx),%eax
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movl (%eax), %eax
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mov %eax, %cr3
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/*
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* Finally, switch to long bit mode by enabling paging. We have
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* to be very careful here because all the segmentation disappears
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* out from underneath us. The spec says we can depend on the
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* subsequent pipelined branch to execute, but *only if* everthing
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* is still identity mapped. If any mappings change, the pipeline
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* will flush.
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*/
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mov %cr0, %eax
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orl $CR0_PG, %eax
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mov %eax, %cr0
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/*
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* At this point paging is enabled, and we are in "compatability" mode.
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* We do another far jump to reload %cs with the 64 bit selector.
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* %cr3 points to a 4-level page table page.
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* We cannot yet jump all the way to the kernel because we can only
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* specify a 32 bit linear address. So, yet another trampoline.
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*
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* The following instruction is:
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* ljmp $kernelcode-gdt, $tramp_64-mptramp_start
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* but gas cannot assemble that. And besides, we patch the targets
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* in early startup and its a little clearer what we are patching.
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*/
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jmp_64:
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.byte 0xea /* opcode for far jump */
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.long tramp_64-mptramp_start /* offset in segment */
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.word kernelcode-gdt /* index in gdt for 64 bit code */
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/*
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* Yeehar! We're running in 64 bit mode! We can mostly ignore our
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* segment registers, and get on with it.
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* Note that we are running at the correct virtual address, but with
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* a 1:1 1GB mirrored mapping over entire address space. We had better
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* switch to a real %cr3 promptly so that we can get to the direct map
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* space. Remember that jmp is relative and that we've been relocated,
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* so use an indirect jump.
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*/
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.code64
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tramp_64:
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movabsq $entry_64,%rax /* 64 bit immediate load */
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jmp *%rax
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.p2align 4,0
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gdt:
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/*
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* All segment descriptor tables start with a null descriptor
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*/
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.long 0x00000000
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.long 0x00000000
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/*
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* This is the 64 bit long mode code descriptor. There is no
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* 64 bit data descriptor.
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*/
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kernelcode:
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.long 0x00000000
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.long 0x00209800
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/*
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* This is the descriptor for the 32 bit boot code.
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* %cs: +A, +R, -C, DPL=0, +P, +D, +G
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* Accessed, Readable, Present, 32 bit, 4G granularity
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*/
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bootcode:
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.long 0x0000ffff
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.long 0x00cf9b00
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/*
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* This is the descriptor for the 32 bit boot data.
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* We load it into %ds and %ss. The bits for each selector
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* are interpreted slightly differently.
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* %ds: +A, +W, -E, DPL=0, +P, +D, +G
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* %ss: +A, +W, -E, DPL=0, +P, +B, +G
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* Accessed, Writeable, Expand up, Present, 32 bit, 4GB
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* For %ds, +D means 'default operand size is 32 bit'.
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* For %ss, +B means the stack register is %esp rather than %sp.
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*/
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bootdata:
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.long 0x0000ffff
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.long 0x00cf9300
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gdtend:
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/*
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* The address of our page table pages that the boot code
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* uses to trampoline up to kernel address space.
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*/
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.globl mptramp_pagetables
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mptramp_pagetables:
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.long 0
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/*
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* The pseudo descriptor for lgdt to use.
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*/
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lgdt_desc:
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.word gdtend-gdt /* Length */
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.long gdt-mptramp_start /* Offset plus %ds << 4 */
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.globl mptramp_end
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mptramp_end:
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/*
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* From here on down is executed in the kernel .text section.
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*
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* Load a real %cr3 that has all the direct map stuff and switches
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* off the 1GB replicated mirror. Load a stack pointer and jump
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* into AP startup code in C.
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*/
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.text
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.code64
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.p2align 4,0
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entry_64:
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movq KPML4phys, %rax
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movq %rax, %cr3
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movq bootSTK, %rsp
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jmp init_secondary
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