bc0203e201
in preparation for the 5300 3x3 NIC. During this particular adventure, I did indeed discover that a whole swath of things made little to no sense. Those included, and are fixed here: * A lot of the antenna configuration bits assume the NIC has two receive chains. That's blatantly untrue for NICs that don't. * There was some disconnect between the antenna configuration when forming a PLCP rate DWORD (which includes the transmit antenna configuration), separate to the link quality antenna configuration. So now there's helper functions to return which antenna configurations to use and those are used wherever an antenna config is required. * The 5300 does up to three stream TX/RX (so MCS0->23), however the link quality table has only 16 slots. This means all of the rate entries are .. well, dual-stream rates. If this is the case, the "last MIMO" parameter can't be 16 or it panics the firmware. Set it to 15. * .. and since yes it has 16 slots, it only would try retransmitting from MCS8->MCS23, which can be quite .. terrible. Hard-code the last two retry slots to be the lowest configured rate. * I noticed some transmit configuration command stuff is different based on firmware API version, so I lifted that code from Linux. * Add / augment some more logging to make it easier to capture this stuff. Now, 3x3 is still terrible because the link quality configuration is plainly not good enough. I'll have to think about that. However, the original goal of this - 3x3 operation on the Intel 5300 NIC - actually worked. There are also rate control bugs in the way this driver handles notifying the net80211 rate control code when AMPDU is enabled. It always steps the rate up to the maximum rate possible - and this eventually ends in much sadness. I'll fix that later. As a side note - 2GHz HT40 now works on all the NICs I have tested. As a second side note - this exposed some bad 3x3 behaviour in the ath(4) rate control code where it starts off at a 3-stream rate and doesn't downgrade quickly enough. This makes the initial dhcp exchange take a long time. I'll fix the ath(4) rate code to start at a low fixed 1x1 MCS rate and step up if everything works out. Tested: * Intel 2200 * Intel 2230 * Intel 5300 * Intel 5100 * Intel 6205 * Intel 100 TODO: * Test the other NICs more thoroughly! Thank you to Michael Kosarev <russiane39@gmail.com> for donating the Intel 5300 NIC and pestering me about it since last year to try and make it all work.
429 lines
10 KiB
C
429 lines
10 KiB
C
/* $FreeBSD$ */
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/* $OpenBSD: if_iwnvar.h,v 1.18 2010/04/30 16:06:46 damien Exp $ */
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/*-
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* Copyright (c) 2013 Cedric GROSS <cg@cgross.info>
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* Copyright (c) 2011 Intel Corporation
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* Copyright (c) 2007, 2008
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* Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2008 Sam Leffler, Errno Consulting
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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enum iwn_rxon_ctx_id {
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IWN_RXON_BSS_CTX,
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IWN_RXON_PAN_CTX,
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IWN_NUM_RXON_CTX
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};
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struct iwn_pan_slot {
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uint16_t time;
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uint8_t type;
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uint8_t reserved;
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} __packed;
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struct iwn_pan_params_cmd {
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uint16_t flags;
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#define IWN_PAN_PARAMS_FLG_SLOTTED_MODE (1 << 3)
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uint8_t reserved;
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uint8_t num_slots;
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struct iwn_pan_slot slots[10];
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} __packed;
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struct iwn_led_mode
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{
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uint8_t led_cur_mode;
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uint64_t led_cur_bt;
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uint64_t led_last_bt;
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uint64_t led_cur_tpt;
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uint64_t led_last_tpt;
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uint64_t led_bt_diff;
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int led_cur_time;
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int led_last_time;
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};
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struct iwn_rx_radiotap_header {
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struct ieee80211_radiotap_header wr_ihdr;
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uint64_t wr_tsft;
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uint8_t wr_flags;
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uint8_t wr_rate;
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uint16_t wr_chan_freq;
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uint16_t wr_chan_flags;
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int8_t wr_dbm_antsignal;
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int8_t wr_dbm_antnoise;
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} __packed;
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#define IWN_RX_RADIOTAP_PRESENT \
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((1 << IEEE80211_RADIOTAP_TSFT) | \
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(1 << IEEE80211_RADIOTAP_FLAGS) | \
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(1 << IEEE80211_RADIOTAP_RATE) | \
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(1 << IEEE80211_RADIOTAP_CHANNEL) | \
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(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
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(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
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struct iwn_tx_radiotap_header {
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struct ieee80211_radiotap_header wt_ihdr;
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uint8_t wt_flags;
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uint8_t wt_rate;
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uint16_t wt_chan_freq;
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uint16_t wt_chan_flags;
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} __packed;
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#define IWN_TX_RADIOTAP_PRESENT \
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((1 << IEEE80211_RADIOTAP_FLAGS) | \
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(1 << IEEE80211_RADIOTAP_RATE) | \
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(1 << IEEE80211_RADIOTAP_CHANNEL))
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struct iwn_dma_info {
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bus_dma_tag_t tag;
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bus_dmamap_t map;
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bus_dma_segment_t seg;
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bus_addr_t paddr;
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caddr_t vaddr;
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bus_size_t size;
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};
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struct iwn_tx_data {
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bus_dmamap_t map;
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bus_addr_t cmd_paddr;
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bus_addr_t scratch_paddr;
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struct mbuf *m;
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struct ieee80211_node *ni;
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};
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struct iwn_tx_ring {
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struct iwn_dma_info desc_dma;
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struct iwn_dma_info cmd_dma;
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struct iwn_tx_desc *desc;
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struct iwn_tx_cmd *cmd;
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struct iwn_tx_data data[IWN_TX_RING_COUNT];
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bus_dma_tag_t data_dmat;
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int qid;
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int queued;
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int cur;
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int read;
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};
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struct iwn_softc;
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struct iwn_rx_data {
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struct mbuf *m;
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bus_dmamap_t map;
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};
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struct iwn_rx_ring {
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struct iwn_dma_info desc_dma;
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struct iwn_dma_info stat_dma;
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uint32_t *desc;
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struct iwn_rx_status *stat;
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struct iwn_rx_data data[IWN_RX_RING_COUNT];
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bus_dma_tag_t data_dmat;
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int cur;
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};
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struct iwn_node {
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struct ieee80211_node ni; /* must be the first */
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uint16_t disable_tid;
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uint8_t id;
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struct {
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uint64_t bitmap;
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int startidx;
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int nframes;
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} agg[IEEE80211_TID_SIZE];
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};
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struct iwn_calib_state {
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uint8_t state;
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#define IWN_CALIB_STATE_INIT 0
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#define IWN_CALIB_STATE_ASSOC 1
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#define IWN_CALIB_STATE_RUN 2
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u_int nbeacons;
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uint32_t noise[3];
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uint32_t rssi[3];
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uint32_t ofdm_x1;
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uint32_t ofdm_mrc_x1;
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uint32_t ofdm_x4;
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uint32_t ofdm_mrc_x4;
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uint32_t cck_x4;
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uint32_t cck_mrc_x4;
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uint32_t bad_plcp_ofdm;
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uint32_t fa_ofdm;
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uint32_t bad_plcp_cck;
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uint32_t fa_cck;
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uint32_t low_fa;
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uint32_t bad_plcp_ht;
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uint8_t cck_state;
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#define IWN_CCK_STATE_INIT 0
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#define IWN_CCK_STATE_LOFA 1
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#define IWN_CCK_STATE_HIFA 2
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uint8_t noise_samples[20];
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u_int cur_noise_sample;
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uint8_t noise_ref;
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uint32_t energy_samples[10];
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u_int cur_energy_sample;
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uint32_t energy_cck;
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};
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struct iwn_calib_info {
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uint8_t *buf;
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u_int len;
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};
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struct iwn_fw_part {
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const uint8_t *text;
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uint32_t textsz;
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const uint8_t *data;
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uint32_t datasz;
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};
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struct iwn_fw_info {
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const uint8_t *data;
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size_t size;
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struct iwn_fw_part init;
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struct iwn_fw_part main;
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struct iwn_fw_part boot;
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};
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struct iwn_ops {
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int (*load_firmware)(struct iwn_softc *);
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void (*read_eeprom)(struct iwn_softc *);
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int (*post_alive)(struct iwn_softc *);
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int (*nic_config)(struct iwn_softc *);
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void (*update_sched)(struct iwn_softc *, int, int, uint8_t,
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uint16_t);
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int (*get_temperature)(struct iwn_softc *);
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int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *);
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int (*set_txpower)(struct iwn_softc *,
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struct ieee80211_channel *, int);
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int (*init_gains)(struct iwn_softc *);
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int (*set_gains)(struct iwn_softc *);
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int (*add_node)(struct iwn_softc *, struct iwn_node_info *,
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int);
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void (*tx_done)(struct iwn_softc *, struct iwn_rx_desc *,
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struct iwn_rx_data *);
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void (*ampdu_tx_start)(struct iwn_softc *,
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struct ieee80211_node *, int, uint8_t, uint16_t);
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void (*ampdu_tx_stop)(struct iwn_softc *, int, uint8_t,
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uint16_t);
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};
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struct iwn_vap {
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struct ieee80211vap iv_vap;
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uint8_t iv_ridx;
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int (*iv_newstate)(struct ieee80211vap *,
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enum ieee80211_state, int);
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int ctx;
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int beacon_int;
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uint8_t macaddr[IEEE80211_ADDR_LEN];
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};
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#define IWN_VAP(_vap) ((struct iwn_vap *)(_vap))
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struct iwn_softc {
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device_t sc_dev;
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struct ifnet *sc_ifp;
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int sc_debug;
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struct mtx sc_mtx;
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u_int sc_flags;
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#define IWN_FLAG_HAS_OTPROM (1 << 1)
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#define IWN_FLAG_CALIB_DONE (1 << 2)
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#define IWN_FLAG_USE_ICT (1 << 3)
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#define IWN_FLAG_INTERNAL_PA (1 << 4)
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#define IWN_FLAG_HAS_11N (1 << 6)
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#define IWN_FLAG_ENH_SENS (1 << 7)
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#define IWN_FLAG_ADV_BTCOEX (1 << 8)
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#define IWN_FLAG_PAN_SUPPORT (1 << 9)
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#define IWN_FLAG_BTCOEX (1 << 10)
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uint8_t hw_type;
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/* subdevice_id used to adjust configuration */
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uint16_t subdevice_id;
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struct iwn_ops ops;
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const char *fwname;
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const struct iwn_sensitivity_limits
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*limits;
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int ntxqs;
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int firstaggqueue;
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int ndmachnls;
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uint8_t broadcast_id;
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int rxonsz;
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int schedsz;
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uint32_t fw_text_maxsz;
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uint32_t fw_data_maxsz;
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uint32_t fwsz;
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bus_size_t sched_txfact_addr;
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uint32_t reset_noise_gain;
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uint32_t noise_gain;
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/* TX scheduler rings. */
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struct iwn_dma_info sched_dma;
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uint16_t *sched;
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uint32_t sched_base;
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/* "Keep Warm" page. */
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struct iwn_dma_info kw_dma;
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/* Firmware image. */
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const struct firmware *fw_fp;
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/* Firmware DMA transfer. */
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struct iwn_dma_info fw_dma;
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/* ICT table. */
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struct iwn_dma_info ict_dma;
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uint32_t *ict;
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int ict_cur;
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/* TX/RX rings. */
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struct iwn_tx_ring txq[IWN5000_NTXQUEUES];
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struct iwn_rx_ring rxq;
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struct resource *mem;
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bus_space_tag_t sc_st;
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bus_space_handle_t sc_sh;
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struct resource *irq;
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void *sc_ih;
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bus_size_t sc_sz;
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int sc_cap_off; /* PCIe Capabilities. */
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/* Tasks used by the driver */
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struct task sc_reinit_task;
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struct task sc_radioon_task;
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struct task sc_radiooff_task;
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struct task sc_panic_task;
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/* Taskqueue */
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struct taskqueue *sc_tq;
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/* Calibration information */
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struct callout calib_to;
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int calib_cnt;
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struct iwn_calib_state calib;
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int last_calib_ticks;
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struct callout watchdog_to;
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struct callout ct_kill_exit_to;
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struct iwn_fw_info fw;
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struct iwn_calib_info calibcmd[IWN5000_PHY_CALIB_MAX_RESULT];
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uint32_t errptr;
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struct iwn_rx_stat last_rx_stat;
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int last_rx_valid;
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struct iwn_ucode_info ucode_info;
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struct iwn_rxon rx_on[IWN_NUM_RXON_CTX];
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struct iwn_rxon *rxon;
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int ctx;
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struct ieee80211vap *ivap[IWN_NUM_RXON_CTX];
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/* General statistics */
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/*
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* The statistics are reset after each channel
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* change. So it may be zeroed after things like
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* a background scan.
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*
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* So for now, this is just a cheap hack to
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* expose the last received statistics dump
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* via an ioctl(). Later versions of this
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* could expose the last 'n' messages, or just
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* provide a pipeline for the firmware responses
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* via something like BPF.
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*/
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struct iwn_stats last_stat;
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int last_stat_valid;
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uint8_t uc_scan_progress;
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uint32_t rawtemp;
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int temp;
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int noise;
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uint32_t qfullmsk;
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uint32_t prom_base;
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struct iwn4965_eeprom_band
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bands[IWN_NBANDS];
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struct iwn_eeprom_chan eeprom_channels[IWN_NBANDS][IWN_MAX_CHAN_PER_BAND];
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uint16_t rfcfg;
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uint8_t calib_ver;
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char eeprom_domain[4];
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uint32_t eeprom_crystal;
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int16_t eeprom_temp;
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int16_t eeprom_temp_high;
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int16_t eeprom_voltage;
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int8_t maxpwr2GHz;
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int8_t maxpwr5GHz;
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int8_t maxpwr[IEEE80211_CHAN_MAX];
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uint32_t tlv_feature_flags;
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int32_t temp_off;
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uint32_t int_mask;
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uint8_t ntxchains;
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uint8_t nrxchains;
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uint8_t txchainmask;
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uint8_t rxchainmask;
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uint8_t chainmask;
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int sc_tx_timer;
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int sc_scan_timer;
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/* Are we doing a scan? */
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int sc_is_scanning;
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struct ieee80211_tx_ampdu *qid2tap[IWN5000_NTXQUEUES];
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int (*sc_ampdu_rx_start)(struct ieee80211_node *,
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struct ieee80211_rx_ampdu *, int, int, int);
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void (*sc_ampdu_rx_stop)(struct ieee80211_node *,
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struct ieee80211_rx_ampdu *);
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int (*sc_addba_request)(struct ieee80211_node *,
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struct ieee80211_tx_ampdu *, int, int, int);
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int (*sc_addba_response)(struct ieee80211_node *,
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struct ieee80211_tx_ampdu *, int, int, int);
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void (*sc_addba_stop)(struct ieee80211_node *,
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struct ieee80211_tx_ampdu *);
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struct iwn_led_mode sc_led;
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struct iwn_rx_radiotap_header sc_rxtap;
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struct iwn_tx_radiotap_header sc_txtap;
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/* The power save level originally configured by user */
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int desired_pwrsave_level;
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/*
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* The current power save level, this may differ from the
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* configured value due to thermal throttling etc.
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*/
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int current_pwrsave_level;
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/* For specific params */
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const struct iwn_base_params *base_params;
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#define IWN_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
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uint32_t ucode_rev;
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};
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#define IWN_LOCK_INIT(_sc) \
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mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
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MTX_NETWORK_LOCK, MTX_DEF)
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#define IWN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define IWN_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
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#define IWN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define IWN_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
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