4ad7e9b01a
SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
372 lines
9.6 KiB
C
372 lines
9.6 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/bhnd/bhndvar.h>
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#include "sibareg.h"
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#include "sibavar.h"
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/**
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* Map a siba(4) OCP vendor code to its corresponding JEDEC JEP-106 vendor
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* code.
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*
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* @param ocp_vendor An OCP vendor code.
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* @return The BHND_MFGID constant corresponding to @p ocp_vendor, or
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* BHND_MFGID_INVALID if the OCP vendor is unknown.
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*/
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uint16_t
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siba_get_bhnd_mfgid(uint16_t ocp_vendor)
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{
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switch (ocp_vendor) {
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case OCP_VENDOR_BCM:
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return (BHND_MFGID_BCM);
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default:
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return (BHND_MFGID_INVALID);
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}
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}
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/**
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* Parse the SIBA_IDH_* fields from the per-core identification
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* registers, returning a siba_core_id representation.
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*
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* @param idhigh The SIBA_R0_IDHIGH register.
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* @param idlow The SIBA_R0_IDLOW register.
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* @param core_id The core id (index) to include in the result.
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* @param unit The unit number to include in the result.
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*/
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struct siba_core_id
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siba_parse_core_id(uint32_t idhigh, uint32_t idlow, u_int core_idx, int unit)
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{
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uint16_t ocp_vendor;
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uint8_t sonics_rev;
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uint8_t num_addrspace;
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uint8_t num_cfg;
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ocp_vendor = SIBA_REG_GET(idhigh, IDH_VENDOR);
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sonics_rev = SIBA_REG_GET(idlow, IDL_SBREV);
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num_addrspace = SIBA_REG_GET(idlow, IDL_NRADDR) + 1 /* + enum block */;
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/* Determine the number of sonics config register blocks */
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num_cfg = SIBA_CFG_NUM_2_2;
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if (sonics_rev >= SIBA_IDL_SBREV_2_3)
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num_cfg = SIBA_CFG_NUM_2_3;
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return (struct siba_core_id) {
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.core_info = {
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.vendor = siba_get_bhnd_mfgid(ocp_vendor),
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.device = SIBA_REG_GET(idhigh, IDH_DEVICE),
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.hwrev = SIBA_IDH_CORE_REV(idhigh),
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.core_idx = core_idx,
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.unit = unit
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},
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.sonics_vendor = ocp_vendor,
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.sonics_rev = sonics_rev,
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.num_addrspace = num_addrspace,
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.num_cfg_blocks = num_cfg
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};
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}
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/**
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* Initialize new port descriptor.
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*
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* @param port_num Port number.
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* @param port_type Port type.
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*/
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static void
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siba_init_port(struct siba_port *port, bhnd_port_type port_type, u_int port_num)
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{
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port->sp_num = port_num;
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port->sp_type = port_type;
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port->sp_num_addrs = 0;
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STAILQ_INIT(&port->sp_addrs);
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}
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/**
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* Deallocate all resources associated with the given port descriptor.
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*
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* @param port Port descriptor to be deallocated.
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*/
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static void
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siba_release_port(struct siba_port *port) {
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struct siba_addrspace *as, *as_next;
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STAILQ_FOREACH_SAFE(as, &port->sp_addrs, sa_link, as_next) {
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free(as, M_BHND);
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}
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}
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/**
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* Allocate and initialize new device info structure, copying the
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* provided core id.
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*
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* @param dev The requesting bus device.
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* @param core Device core info.
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*/
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struct siba_devinfo *
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siba_alloc_dinfo(device_t bus, const struct siba_core_id *core_id)
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{
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struct siba_devinfo *dinfo;
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dinfo = malloc(sizeof(struct siba_devinfo), M_BHND, M_NOWAIT);
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if (dinfo == NULL)
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return NULL;
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dinfo->core_id = *core_id;
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for (u_int i = 0; i < nitems(dinfo->cfg); i++) {
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dinfo->cfg[i] = NULL;
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dinfo->cfg_rid[i] = -1;
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}
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siba_init_port(&dinfo->device_port, BHND_PORT_DEVICE, 0);
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resource_list_init(&dinfo->resources);
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return dinfo;
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}
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/**
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* Return the @p dinfo port instance for @p type, or NULL.
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*
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* @param dinfo The siba device info.
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* @param type The requested port type.
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*
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* @retval siba_port If @p port_type and @p port_num are defined on @p dinfo.
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* @retval NULL If the requested port is not defined on @p dinfo.
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*/
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struct siba_port *
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siba_dinfo_get_port(struct siba_devinfo *dinfo, bhnd_port_type port_type,
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u_int port_num)
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{
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/* We only define a single port for any given type. */
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if (port_num != 0)
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return (NULL);
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switch (port_type) {
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case BHND_PORT_DEVICE:
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return (&dinfo->device_port);
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case BHND_PORT_BRIDGE:
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return (NULL);
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case BHND_PORT_AGENT:
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return (NULL);
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}
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}
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/**
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* Find an address space with @p sid on @p port.
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*
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* @param port The port to search for a matching address space.
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* @param sid The siba-assigned address space ID to search for.
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*/
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struct siba_addrspace *
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siba_find_port_addrspace(struct siba_port *port, uint8_t sid)
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{
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struct siba_addrspace *addrspace;
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STAILQ_FOREACH(addrspace, &port->sp_addrs, sa_link) {
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if (addrspace->sa_sid == sid)
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return (addrspace);
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}
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/* not found */
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return (NULL);
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}
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/**
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* Append a new address space entry to @p port_num of type @p port_type
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* in @p dinfo.
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*
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* The range will also be registered in @p dinfo resource list.
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*
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* @param dinfo The device info entry to update.
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* @param port_type The port type.
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* @param port_num The port number.
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* @param region_num The region index number.
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* @param sid The siba-assigned core-unique address space identifier.
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* @param base The mapping's base address.
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* @param size The mapping size.
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* @param bus_reserved Number of bytes to reserve in @p size for bus use
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* when registering the resource list entry. This is used to reserve bus
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* access to the core's SIBA_CFG* register blocks.
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*
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* @retval 0 success
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* @retval non-zero An error occurred appending the entry.
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*/
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int
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siba_append_dinfo_region(struct siba_devinfo *dinfo, bhnd_port_type port_type,
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u_int port_num, u_int region_num, uint8_t sid, uint32_t base, uint32_t size,
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uint32_t bus_reserved)
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{
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struct siba_addrspace *sa;
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struct siba_port *port;
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/* Verify that base + size will not overflow */
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if (UINT32_MAX - size < base)
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return (ERANGE);
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/* Must not be 0-length */
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if (size == 0)
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return (EINVAL);
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/* Determine target port */
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port = siba_dinfo_get_port(dinfo, port_type, port_num);
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if (port == NULL)
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return (EINVAL);
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/* Allocate new addrspace entry */
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sa = malloc(sizeof(*sa), M_BHND, M_NOWAIT|M_ZERO);
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if (sa == NULL)
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return (ENOMEM);
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sa->sa_base = base;
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sa->sa_size = size;
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sa->sa_sid = sid;
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sa->sa_region_num = region_num;
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/* Populate the resource list */
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size -= bus_reserved;
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sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY,
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base, base + size - 1, size);
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/* Append to target port */
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STAILQ_INSERT_TAIL(&port->sp_addrs, sa, sa_link);
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port->sp_num_addrs++;
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return (0);
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}
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/**
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* Deallocate the given device info structure and any associated resources.
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*
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* @param dev The requesting bus device.
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* @param dinfo Device info to be deallocated.
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*/
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void
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siba_free_dinfo(device_t dev, struct siba_devinfo *dinfo)
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{
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siba_release_port(&dinfo->device_port);
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resource_list_free(&dinfo->resources);
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/* Free all mapped configuration blocks */
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for (u_int i = 0; i < nitems(dinfo->cfg); i++) {
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if (dinfo->cfg[i] == NULL)
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continue;
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bhnd_release_resource(dev, SYS_RES_MEMORY, dinfo->cfg_rid[i],
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dinfo->cfg[i]);
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dinfo->cfg[i] = NULL;
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dinfo->cfg_rid[i] = -1;
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}
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free(dinfo, M_BHND);
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}
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/**
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* Return the core-enumeration-relative offset for the @p addrspace
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* SIBA_R0_ADMATCH* register.
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*
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* @param addrspace The address space index.
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*
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* @retval non-zero success
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* @retval 0 the given @p addrspace index is not supported.
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*/
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u_int
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siba_admatch_offset(uint8_t addrspace)
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{
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switch (addrspace) {
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case 0:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH0);
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case 1:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH1);
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case 2:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH2);
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case 3:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH3);
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default:
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return (0);
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}
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}
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/**
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* Parse a SIBA_R0_ADMATCH* register.
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*
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* @param addrspace The address space index.
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* @param am The address match register value to be parsed.
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* @param[out] addr The parsed address.
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* @param[out] size The parsed size.
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*
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* @retval 0 success
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* @retval non-zero a parse error occured.
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*/
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int
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siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size)
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{
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u_int am_type;
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/* Negative encoding is not supported. This is not used on any
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* currently known devices*/
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if (am & SIBA_AM_ADNEG)
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return (EINVAL);
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/* Extract the base address and size */
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am_type = SIBA_REG_GET(am, AM_TYPE);
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switch (am_type) {
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case 0:
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*addr = am & SIBA_AM_BASE0_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT0) + 1);
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break;
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case 1:
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*addr = am & SIBA_AM_BASE1_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT1) + 1);
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break;
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case 2:
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*addr = am & SIBA_AM_BASE2_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT2) + 1);
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break;
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default:
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return (EINVAL);
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}
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return (0);
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} |