04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
243 lines
7.8 KiB
C
243 lines
7.8 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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* Function prototypes for accessing memory and CSRs on Octeon.
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*
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* <hr>$Revision: 38306 $<hr>
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*/
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#ifndef __CVMX_ACCESS_H__
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#define __CVMX_ACCESS_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* We're going to assume that if we are compiling for Mips then we must be
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running natively on Octoen. It is possible that this code could be
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compiled on a non Octeon Mips that is acting as a PCI/PCIe host. In this
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case this assumption will be wrong and cause issues We can't key off of
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__octeon__ since some people use stock gcc toolchains */
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#if defined(__mips__) && !defined(CVMX_BUILD_FOR_LINUX_HOST)
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#define CVMX_FUNCTION static inline
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#else
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#define CVMX_FUNCTION extern
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#endif
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/**
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* simprintf uses simulator tricks to speed up printouts. The format
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* and args are passed to the simulator and processed natively on the host.
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* Simprintf is limited to 7 arguments, and they all must use %ll (long long)
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* format specifiers to be displayed correctly.
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*
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* @param format
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*
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* @return
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*/
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EXTERN_ASM void simprintf(const char *format, ...);
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/**
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* This function performs some default initialization of the Octeon executive.
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* It initializes the cvmx_bootmem memory allocator with the list of physical
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* memory provided by the bootloader, and creates 1-1 TLB mappings for this
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* memory. This function should be called on all cores that will use either the
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* bootmem allocator or the 1-1 TLB mappings. Applications which require a
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* different configuration can replace this function with a suitable application
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* specific one.
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*
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* @return 0 on success
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* -1 on failure
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*/
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extern int cvmx_user_app_init(void);
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/**
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* Returns the Octeon processor ID.
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*
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* @return Octeon processor ID from COP0
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*/
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CVMX_FUNCTION uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
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/**
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* Convert a memory pointer (void*) into a hardware compatable
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* memory address (uint64_t). Octeon hardware widgets don't
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* understand logical addresses.
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*
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* @param ptr C style memory pointer
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* @return Hardware physical address
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*/
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CVMX_FUNCTION uint64_t cvmx_ptr_to_phys(void *ptr);
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/**
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* Convert a hardware physical address (uint64_t) into a
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* memory pointer (void *).
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*
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* @param physical_address
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* Hardware physical address to memory
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* @return Pointer to memory
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*/
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CVMX_FUNCTION void *cvmx_phys_to_ptr(uint64_t physical_address);
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CVMX_FUNCTION void cvmx_write64_int64(uint64_t address, int64_t value);
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CVMX_FUNCTION void cvmx_write64_uint64(uint64_t address, uint64_t value);
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CVMX_FUNCTION void cvmx_write64_int32(uint64_t address, int32_t value);
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CVMX_FUNCTION void cvmx_write64_uint32(uint64_t address, uint32_t value);
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CVMX_FUNCTION void cvmx_write64_int16(uint64_t address, int16_t value);
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CVMX_FUNCTION void cvmx_write64_uint16(uint64_t address, uint16_t value);
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CVMX_FUNCTION void cvmx_write64_int8(uint64_t address, int8_t value);
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CVMX_FUNCTION void cvmx_write64_uint8(uint64_t address, uint8_t value);
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CVMX_FUNCTION void cvmx_write_csr(uint64_t csr_addr, uint64_t val);
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CVMX_FUNCTION void cvmx_write_io(uint64_t io_addr, uint64_t val);
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CVMX_FUNCTION int64_t cvmx_read64_int64(uint64_t address);
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CVMX_FUNCTION uint64_t cvmx_read64_uint64(uint64_t address);
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CVMX_FUNCTION int32_t cvmx_read64_int32(uint64_t address);
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CVMX_FUNCTION uint32_t cvmx_read64_uint32(uint64_t address);
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CVMX_FUNCTION int16_t cvmx_read64_int16(uint64_t address);
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CVMX_FUNCTION uint16_t cvmx_read64_uint16(uint64_t address);
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CVMX_FUNCTION int8_t cvmx_read64_int8(uint64_t address);
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CVMX_FUNCTION uint8_t cvmx_read64_uint8(uint64_t address);
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CVMX_FUNCTION uint64_t cvmx_read_csr(uint64_t csr_addr);
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CVMX_FUNCTION void cvmx_send_single(uint64_t data);
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CVMX_FUNCTION void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr);
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/**
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* Number of the Core on which the program is currently running.
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*
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* @return Number of cores
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*/
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CVMX_FUNCTION unsigned int cvmx_get_core_num(void);
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/**
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* Returns the number of bits set in the provided value.
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* Simple wrapper for POP instruction.
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*
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* @param val 32 bit value to count set bits in
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*
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* @return Number of bits set
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*/
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CVMX_FUNCTION uint32_t cvmx_pop(uint32_t val);
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/**
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* Returns the number of bits set in the provided value.
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* Simple wrapper for DPOP instruction.
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*
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* @param val 64 bit value to count set bits in
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*
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* @return Number of bits set
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*/
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CVMX_FUNCTION int cvmx_dpop(uint64_t val);
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/**
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* @deprecated
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* Provide current cycle counter as a return value. Deprecated, use
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* cvmx_clock_get_count(CVMX_CLOCK_CORE) to get cycle counter.
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*
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* @return current cycle counter
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*/
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CVMX_FUNCTION uint64_t cvmx_get_cycle(void);
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/**
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* @deprecated
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* Reads a chip global cycle counter. This counts SCLK cycles since
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* chip reset. The counter is 64 bit. This function is deprecated as the rate
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* of the global cycle counter is different between Octeon+ and Octeon2, use
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* cvmx_clock_get_count(CVMX_CLOCK_SCLK) instead. For Octeon2, the clock rate
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* of SCLK may be differnet than the core clock.
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*
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* @return Global chip cycle count since chip reset.
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*/
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CVMX_FUNCTION uint64_t cvmx_get_cycle_global(void) __attribute__((deprecated));
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/**
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* Wait for the specified number of core clock cycles
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*
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* @param cycles
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*/
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CVMX_FUNCTION void cvmx_wait(uint64_t cycles);
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/**
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* Wait for the specified number of micro seconds
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*
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* @param usec micro seconds to wait
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*/
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CVMX_FUNCTION void cvmx_wait_usec(uint64_t usec);
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/**
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* Wait for the specified number of io clock cycles
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*
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* @param cycles
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*/
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CVMX_FUNCTION void cvmx_wait_io(uint64_t cycles);
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/**
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* Perform a soft reset of Octeon
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*
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* @return
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*/
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CVMX_FUNCTION void cvmx_reset_octeon(void);
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/**
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* Read a byte of fuse data
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* @param byte_addr address to read
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*
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* @return fuse value: 0 or 1
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*/
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CVMX_FUNCTION uint8_t cvmx_fuse_read_byte(int byte_addr);
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/**
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* Read a single fuse bit
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*
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* @param fuse Fuse number (0-1024)
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*
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* @return fuse value: 0 or 1
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*/
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CVMX_FUNCTION int cvmx_fuse_read(int fuse);
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#undef CVMX_FUNCTION
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_ACCESS_H__ */
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