ca0ec73c11
The goal of this change is to make the atomic_load_acq_{8,16},
atomic_testandset{,_acq}_long, and atomic_testandclear_long primitives
available in MI-namespace.
The second goal is to get this draft out of my local tree, as anything that
requires a full tinderbox is a big burden out of tree. MD specifics can be
refined individually afterwards.
The generic implementations may not be ideal for your architecture; feel
free to implement better versions. If no subword_atomic definitions are
needed, the include can be removed from your arch's machine/atomic.h.
Generic definitions are guarded by defined macros of the same name. To
avoid picking up conflicting generic definitions, some macro defines are
added to various MD machine/atomic.h to register an existing implementation.
Include _atomic_subword.h in arm and arm64 machine/atomic.h.
For some odd reason, KCSAN only generates some versions of primitives.
Generate the _acq variants of atomic_load.*_8, atomic_load.*_16, and
atomic_testandset.*_long. There are other questionably disabled primitives,
but I didn't run into them, so I left them alone. KCSAN is only built for
amd64 in tinderbox for now.
Add atomic_subword implementations of atomic_load_acq_{8,16} implemented
using masking and atomic_load_acq_32.
Add generic atomic_subword implementations of atomic_testandset_long(),
atomic_testandclear_long(), and atomic_testandset_acq_long(), using
atomic_fcmpset_long() and atomic_fcmpset_acq_long().
On x86, add atomic_testandset_acq_long as an alias for
atomic_testandset_long.
Reviewed by: kevans, rlibby (previous versions both)
Differential Revision: https://reviews.freebsd.org/D22963
610 lines
18 KiB
C
610 lines
18 KiB
C
/*-
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* Copyright (c) 2013 Andrew Turner <andrew@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#define isb() __asm __volatile("isb" : : : "memory")
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/*
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* Options for DMB and DSB:
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* oshld Outer Shareable, load
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* oshst Outer Shareable, store
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* osh Outer Shareable, all
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* nshld Non-shareable, load
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* nshst Non-shareable, store
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* nsh Non-shareable, all
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* ishld Inner Shareable, load
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* ishst Inner Shareable, store
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* ish Inner Shareable, all
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* ld Full system, load
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* st Full system, store
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* sy Full system, all
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*/
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#define dsb(opt) __asm __volatile("dsb " __STRING(opt) : : : "memory")
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#define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory")
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#define mb() dmb(sy) /* Full system memory barrier all */
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#define wmb() dmb(st) /* Full system memory barrier store */
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#define rmb() dmb(ld) /* Full system memory barrier load */
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#if defined(KCSAN) && !defined(KCSAN_RUNTIME)
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#include <sys/_cscan_atomic.h>
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#else
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#include <sys/atomic_common.h>
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#ifdef _KERNEL
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extern bool lse_supported;
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#ifdef LSE_ATOMICS
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#define _ATOMIC_LSE_SUPPORTED 1
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#else
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#define _ATOMIC_LSE_SUPPORTED lse_supported
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#endif
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#else
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#define _ATOMIC_LSE_SUPPORTED 0
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#endif
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#define _ATOMIC_OP_PROTO(t, op, bar, flav) \
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static __inline void \
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atomic_##op##_##bar##t##flav(volatile uint##t##_t *p, uint##t##_t val)
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#define _ATOMIC_OP_IMPL(t, w, s, op, llsc_asm_op, lse_asm_op, pre, bar, a, l) \
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_ATOMIC_OP_PROTO(t, op, bar, _llsc) \
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{ \
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uint##t##_t tmp; \
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int res; \
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\
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pre; \
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__asm __volatile( \
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"1: ld"#a"xr"#s" %"#w"0, [%2]\n" \
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" "#llsc_asm_op" %"#w"0, %"#w"0, %"#w"3\n" \
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" st"#l"xr"#s" %w1, %"#w"0, [%2]\n" \
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" cbnz %w1, 1b\n" \
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: "=&r"(tmp), "=&r"(res) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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} \
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\
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_ATOMIC_OP_PROTO(t, op, bar, _lse) \
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{ \
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uint##t##_t tmp; \
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\
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pre; \
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__asm __volatile( \
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".arch_extension lse\n" \
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"ld"#lse_asm_op#a#l#s" %"#w"2, %"#w"0, [%1]\n" \
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".arch_extension nolse\n" \
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: "=r" (tmp) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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} \
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\
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_ATOMIC_OP_PROTO(t, op, bar, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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atomic_##op##_##bar##t##_lse(p, val); \
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else \
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atomic_##op##_##bar##t##_llsc(p, val); \
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}
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#define __ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre, bar, a, l) \
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_ATOMIC_OP_IMPL(8, w, b, op, llsc_asm_op, lse_asm_op, pre, \
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bar, a, l) \
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_ATOMIC_OP_IMPL(16, w, h, op, llsc_asm_op, lse_asm_op, pre, \
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bar, a, l) \
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_ATOMIC_OP_IMPL(32, w, , op, llsc_asm_op, lse_asm_op, pre, \
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bar, a, l) \
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_ATOMIC_OP_IMPL(64, , , op, llsc_asm_op, lse_asm_op, pre, \
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bar, a, l)
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#define _ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre) \
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__ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre, , , ) \
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__ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre, acq_, a, ) \
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__ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre, rel_, , l)
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_ATOMIC_OP(add, add, add, )
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_ATOMIC_OP(clear, bic, clr, )
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_ATOMIC_OP(set, orr, set, )
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_ATOMIC_OP(subtract, add, add, val = -val)
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#define _ATOMIC_CMPSET_PROTO(t, bar, flav) \
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static __inline int \
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atomic_cmpset_##bar##t##flav(volatile uint##t##_t *p, \
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uint##t##_t cmpval, uint##t##_t newval)
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#define _ATOMIC_FCMPSET_PROTO(t, bar, flav) \
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static __inline int \
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atomic_fcmpset_##bar##t##flav(volatile uint##t##_t *p, \
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uint##t##_t *cmpval, uint##t##_t newval)
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#define _ATOMIC_CMPSET_IMPL(t, w, s, bar, a, l) \
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_ATOMIC_CMPSET_PROTO(t, bar, _llsc) \
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{ \
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uint##t##_t tmp; \
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int res; \
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\
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__asm __volatile( \
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"1: mov %w1, #1\n" \
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" ld"#a"xr"#s" %"#w"0, [%2]\n" \
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" cmp %"#w"0, %"#w"3\n" \
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" b.ne 2f\n" \
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" st"#l"xr"#s" %w1, %"#w"4, [%2]\n" \
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" cbnz %w1, 1b\n" \
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"2:" \
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: "=&r"(tmp), "=&r"(res) \
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: "r" (p), "r" (cmpval), "r" (newval) \
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: "cc", "memory" \
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); \
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\
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return (!res); \
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} \
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\
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_ATOMIC_CMPSET_PROTO(t, bar, _lse) \
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{ \
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uint##t##_t oldval; \
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int res; \
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\
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oldval = cmpval; \
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__asm __volatile( \
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".arch_extension lse\n" \
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"cas"#a#l#s" %"#w"1, %"#w"4, [%3]\n" \
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"cmp %"#w"1, %"#w"2\n" \
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"cset %w0, eq\n" \
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".arch_extension nolse\n" \
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: "=r" (res), "+&r" (cmpval) \
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: "r" (oldval), "r" (p), "r" (newval) \
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: "cc", "memory" \
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); \
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\
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return (res); \
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} \
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\
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_ATOMIC_CMPSET_PROTO(t, bar, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_cmpset_##bar##t##_lse(p, cmpval, \
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newval)); \
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else \
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return (atomic_cmpset_##bar##t##_llsc(p, cmpval, \
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newval)); \
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} \
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\
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_ATOMIC_FCMPSET_PROTO(t, bar, _llsc) \
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{ \
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uint##t##_t _cmpval, tmp; \
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int res; \
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\
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_cmpval = *cmpval; \
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__asm __volatile( \
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" mov %w1, #1\n" \
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" ld"#a"xr"#s" %"#w"0, [%2]\n" \
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" cmp %"#w"0, %"#w"3\n" \
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" b.ne 1f\n" \
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" st"#l"xr"#s" %w1, %"#w"4, [%2]\n" \
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"1:" \
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: "=&r"(tmp), "=&r"(res) \
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: "r" (p), "r" (_cmpval), "r" (newval) \
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: "cc", "memory" \
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); \
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*cmpval = tmp; \
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\
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return (!res); \
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} \
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\
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_ATOMIC_FCMPSET_PROTO(t, bar, _lse) \
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{ \
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uint##t##_t _cmpval, tmp; \
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int res; \
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\
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_cmpval = tmp = *cmpval; \
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__asm __volatile( \
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".arch_extension lse\n" \
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"cas"#a#l#s" %"#w"1, %"#w"4, [%3]\n" \
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"cmp %"#w"1, %"#w"2\n" \
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"cset %w0, eq\n" \
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".arch_extension nolse\n" \
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: "=r" (res), "+&r" (tmp) \
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: "r" (_cmpval), "r" (p), "r" (newval) \
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: "cc", "memory" \
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); \
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*cmpval = tmp; \
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\
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return (res); \
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} \
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\
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_ATOMIC_FCMPSET_PROTO(t, bar, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_fcmpset_##bar##t##_lse(p, cmpval, \
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newval)); \
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else \
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return (atomic_fcmpset_##bar##t##_llsc(p, cmpval, \
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newval)); \
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}
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#define _ATOMIC_CMPSET(bar, a, l) \
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_ATOMIC_CMPSET_IMPL(8, w, b, bar, a, l) \
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_ATOMIC_CMPSET_IMPL(16, w, h, bar, a, l) \
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_ATOMIC_CMPSET_IMPL(32, w, , bar, a, l) \
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_ATOMIC_CMPSET_IMPL(64, , , bar, a, l)
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#define atomic_cmpset_8 atomic_cmpset_8
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#define atomic_fcmpset_8 atomic_fcmpset_8
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#define atomic_cmpset_16 atomic_cmpset_16
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#define atomic_fcmpset_16 atomic_fcmpset_16
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_ATOMIC_CMPSET( , , )
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_ATOMIC_CMPSET(acq_, a, )
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_ATOMIC_CMPSET(rel_, ,l)
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#define _ATOMIC_FETCHADD_PROTO(t, flav) \
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static __inline uint##t##_t \
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atomic_fetchadd_##t##flav(volatile uint##t##_t *p, uint##t##_t val)
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#define _ATOMIC_FETCHADD_IMPL(t, w) \
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_ATOMIC_FETCHADD_PROTO(t, _llsc) \
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{ \
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uint##t##_t ret, tmp; \
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int res; \
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\
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__asm __volatile( \
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"1: ldxr %"#w"2, [%3]\n" \
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" add %"#w"0, %"#w"2, %"#w"4\n" \
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" stxr %w1, %"#w"0, [%3]\n" \
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" cbnz %w1, 1b\n" \
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: "=&r" (tmp), "=&r" (res), "=&r" (ret) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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\
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return (ret); \
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} \
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\
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_ATOMIC_FETCHADD_PROTO(t, _lse) \
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{ \
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uint##t##_t ret; \
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\
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__asm __volatile( \
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".arch_extension lse\n" \
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"ldadd %"#w"2, %"#w"0, [%1]\n" \
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".arch_extension nolse\n" \
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: "=r" (ret) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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\
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return (ret); \
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} \
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\
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_ATOMIC_FETCHADD_PROTO(t, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_fetchadd_##t##_lse(p, val)); \
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else \
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return (atomic_fetchadd_##t##_llsc(p, val)); \
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}
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_ATOMIC_FETCHADD_IMPL(32, w)
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_ATOMIC_FETCHADD_IMPL(64, )
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#define _ATOMIC_SWAP_PROTO(t, flav) \
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static __inline uint##t##_t \
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atomic_swap_##t##flav(volatile uint##t##_t *p, uint##t##_t val)
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#define _ATOMIC_READANDCLEAR_PROTO(t, flav) \
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static __inline uint##t##_t \
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atomic_readandclear_##t##flav(volatile uint##t##_t *p)
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#define _ATOMIC_SWAP_IMPL(t, w, zreg) \
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_ATOMIC_SWAP_PROTO(t, _llsc) \
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{ \
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uint##t##_t ret; \
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int res; \
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\
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__asm __volatile( \
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"1: ldxr %"#w"1, [%2]\n" \
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" stxr %w0, %"#w"3, [%2]\n" \
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" cbnz %w0, 1b\n" \
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: "=&r" (res), "=&r" (ret) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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\
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return (ret); \
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} \
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\
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_ATOMIC_SWAP_PROTO(t, _lse) \
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{ \
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uint##t##_t ret; \
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\
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__asm __volatile( \
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".arch_extension lse\n" \
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"swp %"#w"2, %"#w"0, [%1]\n" \
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".arch_extension nolse\n" \
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: "=r" (ret) \
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: "r" (p), "r" (val) \
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: "memory" \
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); \
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\
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return (ret); \
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} \
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\
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_ATOMIC_SWAP_PROTO(t, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_swap_##t##_lse(p, val)); \
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else \
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return (atomic_swap_##t##_llsc(p, val)); \
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} \
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\
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_ATOMIC_READANDCLEAR_PROTO(t, _llsc) \
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{ \
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uint##t##_t ret; \
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int res; \
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\
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__asm __volatile( \
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"1: ldxr %"#w"1, [%2]\n" \
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" stxr %w0, "#zreg", [%2]\n" \
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" cbnz %w0, 1b\n" \
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: "=&r" (res), "=&r" (ret) \
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: "r" (p) \
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: "memory" \
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); \
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\
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return (ret); \
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} \
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\
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_ATOMIC_READANDCLEAR_PROTO(t, _lse) \
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{ \
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return (atomic_swap_##t##_lse(p, 0)); \
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} \
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\
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_ATOMIC_READANDCLEAR_PROTO(t, ) \
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{ \
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if (_ATOMIC_LSE_SUPPORTED) \
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return (atomic_readandclear_##t##_lse(p)); \
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else \
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return (atomic_readandclear_##t##_llsc(p)); \
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}
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_ATOMIC_SWAP_IMPL(32, w, wzr)
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_ATOMIC_SWAP_IMPL(64, , xzr)
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#define _ATOMIC_TEST_OP_PROTO(t, op, flav) \
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static __inline int \
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atomic_testand##op##_##t##flav(volatile uint##t##_t *p, u_int val)
|
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#define _ATOMIC_TEST_OP_IMPL(t, w, op, llsc_asm_op, lse_asm_op) \
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_ATOMIC_TEST_OP_PROTO(t, op, _llsc) \
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|
{ \
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|
uint##t##_t mask, old, tmp; \
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int res; \
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\
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mask = 1u << (val & 0x1f); \
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__asm __volatile( \
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"1: ldxr %"#w"2, [%3]\n" \
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" "#llsc_asm_op" %"#w"0, %"#w"2, %"#w"4\n" \
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" stxr %w1, %"#w"0, [%3]\n" \
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" cbnz %w1, 1b\n" \
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|
: "=&r" (tmp), "=&r" (res), "=&r" (old) \
|
|
: "r" (p), "r" (mask) \
|
|
: "memory" \
|
|
); \
|
|
\
|
|
return ((old & mask) != 0); \
|
|
} \
|
|
\
|
|
_ATOMIC_TEST_OP_PROTO(t, op, _lse) \
|
|
{ \
|
|
uint##t##_t mask, old; \
|
|
\
|
|
mask = 1u << (val & 0x1f); \
|
|
__asm __volatile( \
|
|
".arch_extension lse\n" \
|
|
"ld"#lse_asm_op" %"#w"2, %"#w"0, [%1]\n" \
|
|
".arch_extension nolse\n" \
|
|
: "=r" (old) \
|
|
: "r" (p), "r" (mask) \
|
|
: "memory" \
|
|
); \
|
|
\
|
|
return ((old & mask) != 0); \
|
|
} \
|
|
\
|
|
_ATOMIC_TEST_OP_PROTO(t, op, ) \
|
|
{ \
|
|
if (_ATOMIC_LSE_SUPPORTED) \
|
|
return (atomic_testand##op##_##t##_lse(p, val)); \
|
|
else \
|
|
return (atomic_testand##op##_##t##_llsc(p, val)); \
|
|
}
|
|
|
|
#define _ATOMIC_TEST_OP(op, llsc_asm_op, lse_asm_op) \
|
|
_ATOMIC_TEST_OP_IMPL(32, w, op, llsc_asm_op, lse_asm_op) \
|
|
_ATOMIC_TEST_OP_IMPL(64, , op, llsc_asm_op, lse_asm_op)
|
|
|
|
_ATOMIC_TEST_OP(clear, bic, clr)
|
|
_ATOMIC_TEST_OP(set, orr, set)
|
|
|
|
#define _ATOMIC_LOAD_ACQ_IMPL(t, w, s) \
|
|
static __inline uint##t##_t \
|
|
atomic_load_acq_##t(volatile uint##t##_t *p) \
|
|
{ \
|
|
uint##t##_t ret; \
|
|
\
|
|
__asm __volatile( \
|
|
"ldar"#s" %"#w"0, [%1]\n" \
|
|
: "=&r" (ret) \
|
|
: "r" (p) \
|
|
: "memory"); \
|
|
\
|
|
return (ret); \
|
|
}
|
|
|
|
#define atomic_load_acq_8 atomic_load_acq_8
|
|
#define atomic_load_acq_16 atomic_load_acq_16
|
|
_ATOMIC_LOAD_ACQ_IMPL(8, w, b)
|
|
_ATOMIC_LOAD_ACQ_IMPL(16, w, h)
|
|
_ATOMIC_LOAD_ACQ_IMPL(32, w, )
|
|
_ATOMIC_LOAD_ACQ_IMPL(64, , )
|
|
|
|
#define _ATOMIC_STORE_REL_IMPL(t, w, s) \
|
|
static __inline void \
|
|
atomic_store_rel_##t(volatile uint##t##_t *p, uint##t##_t val) \
|
|
{ \
|
|
__asm __volatile( \
|
|
"stlr"#s" %"#w"0, [%1]\n" \
|
|
: \
|
|
: "r" (val), "r" (p) \
|
|
: "memory"); \
|
|
}
|
|
|
|
_ATOMIC_STORE_REL_IMPL(8, w, b)
|
|
_ATOMIC_STORE_REL_IMPL(16, w, h)
|
|
_ATOMIC_STORE_REL_IMPL(32, w, )
|
|
_ATOMIC_STORE_REL_IMPL(64, , )
|
|
|
|
#define atomic_add_int atomic_add_32
|
|
#define atomic_fcmpset_int atomic_fcmpset_32
|
|
#define atomic_clear_int atomic_clear_32
|
|
#define atomic_cmpset_int atomic_cmpset_32
|
|
#define atomic_fetchadd_int atomic_fetchadd_32
|
|
#define atomic_readandclear_int atomic_readandclear_32
|
|
#define atomic_set_int atomic_set_32
|
|
#define atomic_swap_int atomic_swap_32
|
|
#define atomic_subtract_int atomic_subtract_32
|
|
#define atomic_testandclear_int atomic_testandclear_32
|
|
#define atomic_testandset_int atomic_testandset_32
|
|
|
|
#define atomic_add_acq_int atomic_add_acq_32
|
|
#define atomic_fcmpset_acq_int atomic_fcmpset_acq_32
|
|
#define atomic_clear_acq_int atomic_clear_acq_32
|
|
#define atomic_cmpset_acq_int atomic_cmpset_acq_32
|
|
#define atomic_load_acq_int atomic_load_acq_32
|
|
#define atomic_set_acq_int atomic_set_acq_32
|
|
#define atomic_subtract_acq_int atomic_subtract_acq_32
|
|
|
|
#define atomic_add_rel_int atomic_add_rel_32
|
|
#define atomic_fcmpset_rel_int atomic_fcmpset_rel_32
|
|
#define atomic_clear_rel_int atomic_clear_rel_32
|
|
#define atomic_cmpset_rel_int atomic_cmpset_rel_32
|
|
#define atomic_set_rel_int atomic_set_rel_32
|
|
#define atomic_subtract_rel_int atomic_subtract_rel_32
|
|
#define atomic_store_rel_int atomic_store_rel_32
|
|
|
|
#define atomic_add_long atomic_add_64
|
|
#define atomic_fcmpset_long atomic_fcmpset_64
|
|
#define atomic_clear_long atomic_clear_64
|
|
#define atomic_cmpset_long atomic_cmpset_64
|
|
#define atomic_fetchadd_long atomic_fetchadd_64
|
|
#define atomic_readandclear_long atomic_readandclear_64
|
|
#define atomic_set_long atomic_set_64
|
|
#define atomic_swap_long atomic_swap_64
|
|
#define atomic_subtract_long atomic_subtract_64
|
|
#define atomic_testandclear_long atomic_testandclear_64
|
|
#define atomic_testandset_long atomic_testandset_64
|
|
|
|
#define atomic_add_ptr atomic_add_64
|
|
#define atomic_fcmpset_ptr atomic_fcmpset_64
|
|
#define atomic_clear_ptr atomic_clear_64
|
|
#define atomic_cmpset_ptr atomic_cmpset_64
|
|
#define atomic_fetchadd_ptr atomic_fetchadd_64
|
|
#define atomic_readandclear_ptr atomic_readandclear_64
|
|
#define atomic_set_ptr atomic_set_64
|
|
#define atomic_swap_ptr atomic_swap_64
|
|
#define atomic_subtract_ptr atomic_subtract_64
|
|
|
|
#define atomic_add_acq_long atomic_add_acq_64
|
|
#define atomic_fcmpset_acq_long atomic_fcmpset_acq_64
|
|
#define atomic_clear_acq_long atomic_clear_acq_64
|
|
#define atomic_cmpset_acq_long atomic_cmpset_acq_64
|
|
#define atomic_load_acq_long atomic_load_acq_64
|
|
#define atomic_set_acq_long atomic_set_acq_64
|
|
#define atomic_subtract_acq_long atomic_subtract_acq_64
|
|
|
|
#define atomic_add_acq_ptr atomic_add_acq_64
|
|
#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_64
|
|
#define atomic_clear_acq_ptr atomic_clear_acq_64
|
|
#define atomic_cmpset_acq_ptr atomic_cmpset_acq_64
|
|
#define atomic_load_acq_ptr atomic_load_acq_64
|
|
#define atomic_set_acq_ptr atomic_set_acq_64
|
|
#define atomic_subtract_acq_ptr atomic_subtract_acq_64
|
|
|
|
#define atomic_add_rel_long atomic_add_rel_64
|
|
#define atomic_fcmpset_rel_long atomic_fcmpset_rel_64
|
|
#define atomic_clear_rel_long atomic_clear_rel_64
|
|
#define atomic_cmpset_rel_long atomic_cmpset_rel_64
|
|
#define atomic_set_rel_long atomic_set_rel_64
|
|
#define atomic_subtract_rel_long atomic_subtract_rel_64
|
|
#define atomic_store_rel_long atomic_store_rel_64
|
|
|
|
#define atomic_add_rel_ptr atomic_add_rel_64
|
|
#define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_64
|
|
#define atomic_clear_rel_ptr atomic_clear_rel_64
|
|
#define atomic_cmpset_rel_ptr atomic_cmpset_rel_64
|
|
#define atomic_set_rel_ptr atomic_set_rel_64
|
|
#define atomic_subtract_rel_ptr atomic_subtract_rel_64
|
|
#define atomic_store_rel_ptr atomic_store_rel_64
|
|
|
|
static __inline void
|
|
atomic_thread_fence_acq(void)
|
|
{
|
|
|
|
dmb(ld);
|
|
}
|
|
|
|
static __inline void
|
|
atomic_thread_fence_rel(void)
|
|
{
|
|
|
|
dmb(sy);
|
|
}
|
|
|
|
static __inline void
|
|
atomic_thread_fence_acq_rel(void)
|
|
{
|
|
|
|
dmb(sy);
|
|
}
|
|
|
|
static __inline void
|
|
atomic_thread_fence_seq_cst(void)
|
|
{
|
|
|
|
dmb(sy);
|
|
}
|
|
|
|
#include <sys/_atomic_subword.h>
|
|
|
|
#endif /* KCSAN && !KCSAN_RUNTIME */
|
|
#endif /* _MACHINE_ATOMIC_H_ */
|