- don't uselessly initialize the fifo "DMA" bit at attach time.
- initialize the fifo "DMA" bit at open time. Without this, the device
interrupts for every character received, reducing input performance
to that of an 8250.
- don't uselessly initialize the fifo trigger level to 8 (scaled to
256) at attach time.
- don't scale the fifo trigger level to 512 bytes. The driver's pseudo-
dma buffer has size 256, so it can't handle bursts of size 512 or 256.
It should be able to handle the second lowest ftl (2 scaled to 64).
- don't reset the fifos in siostop(). Reset triggers a hardware bug
involving wedging of the output interrupt bit This workaround
unfortunately requires ESP support to be configured.
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