cfc8861b06
- Put all clock and control unit driver in BUS_PASS_RESOURCE except for the DE2 CCU as it needs the main CCU to be available. - Use BUS_PASS_CPU for a20_cpu_cfg as it makes more sense. - For aw_syscon use SCHEDULER pass as we need it early for drivers that attach in BUS_PASS_SUPPORTDEV - For the rest we can use BUS_PASS_SUPPORTDEV
154 lines
3.9 KiB
C
154 lines
3.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "a10_sramc.h"
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#define SRAM_CTL1_CFG 0x04
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#define CTL1_CFG_SRAMD_MAP_USB0 (1 << 0)
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struct a10_sramc_softc {
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struct resource *res;
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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};
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static struct a10_sramc_softc *a10_sramc_sc;
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#define sramc_read_4(sc, reg) \
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bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
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#define sramc_write_4(sc, reg, val) \
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bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
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static int
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a10_sramc_probe(device_t dev)
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{
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if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-sram-controller")) {
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device_set_desc(dev, "Allwinner sramc module");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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a10_sramc_attach(device_t dev)
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{
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struct a10_sramc_softc *sc = device_get_softc(dev);
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int rid = 0;
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sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->res) {
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device_printf(dev, "could not allocate resource\n");
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return (ENXIO);
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}
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sc->bst = rman_get_bustag(sc->res);
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sc->bsh = rman_get_bushandle(sc->res);
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a10_sramc_sc = sc;
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return (0);
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}
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static device_method_t a10_sramc_methods[] = {
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DEVMETHOD(device_probe, a10_sramc_probe),
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DEVMETHOD(device_attach, a10_sramc_attach),
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{ 0, 0 }
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};
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static driver_t a10_sramc_driver = {
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"a10_sramc",
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a10_sramc_methods,
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sizeof(struct a10_sramc_softc),
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};
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static devclass_t a10_sramc_devclass;
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EARLY_DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, a10_sramc_devclass,
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0, 0, BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_FIRST);
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int
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a10_map_to_emac(void)
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{
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struct a10_sramc_softc *sc = a10_sramc_sc;
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uint32_t reg_value;
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if (sc == NULL)
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return (ENXIO);
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/* Map SRAM to EMAC, set bit 2 and 4. */
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reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
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reg_value |= 0x5 << 2;
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sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
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return (0);
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}
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int
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a10_map_to_otg(void)
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{
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struct a10_sramc_softc *sc = a10_sramc_sc;
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uint32_t reg_value;
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if (sc == NULL)
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return (ENXIO);
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/* Map SRAM to OTG */
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reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
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reg_value |= CTL1_CFG_SRAMD_MAP_USB0;
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sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
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return (0);
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}
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