freebsd-nq/sys/riscv
John Baldwin 7a102e0463 Implement pmap_sync_icache().
This invokes "fence" on the hart performing the write followed by an IPI
to execute "fence.i" on all harts.

This is required to support userland debuggers setting breakpoints in
user processes.

Reviewed by:	br (earlier version), markj
Approved by:	re (gjb)
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D17139
2018-09-24 17:41:29 +00:00
..
conf Enable VIMAGE support for RISC-V. 2018-09-12 08:13:54 +00:00
include Various fixes for floating point on RISC-V. 2018-09-19 23:45:18 +00:00
riscv Implement pmap_sync_icache(). 2018-09-24 17:41:29 +00:00