e95b7f61b9
Submitted by: attilio MFC after: 1 week
1021 lines
24 KiB
C
1021 lines
24 KiB
C
/*-
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* Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (C) 2001 Benno Rice
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
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*/
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_compat.h"
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#include "opt_ddb.h"
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#include "opt_kstack_pages.h"
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#include "opt_msgbuf.h"
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/cpu.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <sys/exec.h>
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#include <sys/ktr.h>
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/imgact.h>
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#include <sys/msgbuf.h>
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#include <sys/ptrace.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_object.h>
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#include <vm/vm_pager.h>
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#include <machine/cpu.h>
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#include <machine/kdb.h>
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#include <machine/reg.h>
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#include <machine/vmparam.h>
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#include <machine/spr.h>
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#include <machine/hid.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#include <machine/md_var.h>
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#include <machine/mmuvar.h>
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#include <machine/sigframe.h>
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#include <machine/metadata.h>
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#include <machine/bootinfo.h>
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#include <machine/platform.h>
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#include <sys/linker.h>
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#include <sys/reboot.h>
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#include <powerpc/mpc85xx/ocpbus.h>
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#include <powerpc/mpc85xx/mpc85xx.h>
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#ifdef DDB
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extern vm_offset_t ksym_start, ksym_end;
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#endif
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#ifdef DEBUG
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#define debugf(fmt, args...) printf(fmt, ##args)
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#else
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#define debugf(fmt, args...)
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#endif
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extern unsigned char kernel_text[];
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extern unsigned char _etext[];
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extern unsigned char _edata[];
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extern unsigned char __bss_start[];
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extern unsigned char __sbss_start[];
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extern unsigned char __sbss_end[];
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extern unsigned char _end[];
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extern void dcache_enable(void);
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extern void dcache_inval(void);
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extern void icache_enable(void);
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extern void icache_inval(void);
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struct kva_md_info kmi;
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struct pcpu __pcpu[MAXCPU];
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struct trapframe frame0;
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int cold = 1;
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long realmem = 0;
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long Maxmem = 0;
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struct bootinfo *bootinfo;
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char machine[] = "powerpc";
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SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
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int cacheline_size = 32;
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SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
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CTLFLAG_RD, &cacheline_size, 0, "");
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int hw_direct_map = 0;
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static void cpu_e500_startup(void *);
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SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL);
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void print_kernel_section_addr(void);
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void print_bootinfo(void);
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void print_kenv(void);
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u_int e500_init(u_int32_t, u_int32_t, void *);
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static void
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cpu_e500_startup(void *dummy)
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{
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int indx, size;
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/* Initialise the decrementer-based clock. */
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decr_init();
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/* Good {morning,afternoon,evening,night}. */
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cpu_setup(PCPU_GET(cpuid));
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printf("real memory = %ld (%ld MB)\n", ptoa(physmem),
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ptoa(physmem) / 1048576);
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realmem = physmem;
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/* Display any holes after the first chunk of extended memory. */
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if (bootverbose) {
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printf("Physical memory chunk(s):\n");
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for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
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size = phys_avail[indx + 1] - phys_avail[indx];
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printf("0x%08x - 0x%08x, %d bytes (%d pages)\n",
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phys_avail[indx], phys_avail[indx + 1] - 1,
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size, size / PAGE_SIZE);
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}
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}
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vm_ksubmap_init(&kmi);
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printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
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ptoa(cnt.v_free_count) / 1048576);
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/* Set up buffers, so they can be used to read disk labels. */
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bufinit();
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vm_pager_bufferinit();
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}
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static char *
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kenv_next(char *cp)
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{
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if (cp != NULL) {
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while (*cp != 0)
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cp++;
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cp++;
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if (*cp == 0)
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cp = NULL;
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}
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return (cp);
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}
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void
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print_kenv(void)
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{
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int len;
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char *cp;
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debugf("loader passed (static) kenv:\n");
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if (kern_envp == NULL) {
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debugf(" no env, null ptr\n");
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return;
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}
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debugf(" kern_envp = 0x%08x\n", (u_int32_t)kern_envp);
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len = 0;
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for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
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debugf(" %x %s\n", (u_int32_t)cp, cp);
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}
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void
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print_bootinfo(void)
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{
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struct bi_mem_region *mr;
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struct bi_eth_addr *eth;
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int i, j;
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debugf("bootinfo:\n");
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if (bootinfo == NULL) {
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debugf(" no bootinfo, null ptr\n");
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return;
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}
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debugf(" version = 0x%08x\n", bootinfo->bi_version);
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debugf(" ccsrbar = 0x%08x\n", bootinfo->bi_bar_base);
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debugf(" cpu_clk = 0x%08x\n", bootinfo->bi_cpu_clk);
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debugf(" bus_clk = 0x%08x\n", bootinfo->bi_bus_clk);
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debugf(" mem regions:\n");
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mr = (struct bi_mem_region *)bootinfo->bi_data;
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for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++)
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debugf(" #%d, base = 0x%08x, size = 0x%08x\n", i,
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mr->mem_base, mr->mem_size);
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debugf(" eth addresses:\n");
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eth = (struct bi_eth_addr *)mr;
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for (i = 0; i < bootinfo->bi_eth_addr_no; i++, eth++) {
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debugf(" #%d, addr = ", i);
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for (j = 0; j < 6; j++)
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debugf("%02x ", eth->mac_addr[j]);
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debugf("\n");
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}
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}
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void
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print_kernel_section_addr(void)
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{
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debugf("kernel image addresses:\n");
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debugf(" kernel_text = 0x%08x\n", (uint32_t)kernel_text);
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debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
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debugf(" _edata = 0x%08x\n", (uint32_t)_edata);
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debugf(" __sbss_start = 0x%08x\n", (uint32_t)__sbss_start);
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debugf(" __sbss_end = 0x%08x\n", (uint32_t)__sbss_end);
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debugf(" __sbss_start = 0x%08x\n", (uint32_t)__bss_start);
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debugf(" _end = 0x%08x\n", (uint32_t)_end);
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}
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struct bi_mem_region *
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bootinfo_mr(void)
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{
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return ((struct bi_mem_region *)bootinfo->bi_data);
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}
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struct bi_eth_addr *
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bootinfo_eth(void)
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{
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struct bi_mem_region *mr;
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struct bi_eth_addr *eth;
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int i;
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/* Advance to the eth section */
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mr = bootinfo_mr();
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for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++)
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;
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eth = (struct bi_eth_addr *)mr;
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return (eth);
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}
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u_int
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e500_init(u_int32_t startkernel, u_int32_t endkernel, void *mdp)
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{
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struct pcpu *pc;
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void *kmdp;
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vm_offset_t end;
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uint32_t csr;
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kmdp = NULL;
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end = endkernel;
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/*
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* Parse metadata and fetch parameters. This must be done as the first
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* step as we need bootinfo data to at least init the console
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*/
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if (mdp != NULL) {
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preload_metadata = mdp;
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kmdp = preload_search_by_type("elf kernel");
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if (kmdp != NULL) {
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bootinfo = (struct bootinfo *)preload_search_info(kmdp,
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MODINFO_METADATA | MODINFOMD_BOOTINFO);
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boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
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kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
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end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
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#ifdef DDB
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ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
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ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
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#endif
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}
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} else {
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/*
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* We should scream but how? - without CCSR bar (in bootinfo)
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* cannot even output anything...
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*/
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/*
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* FIXME add return value and handle in the locore so we can
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* return to the loader maybe? (this seems not very easy to
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* restore everything as the TLB have all been reprogrammed
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* in the locore etc...)
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*/
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while(1);
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}
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/* Initialize TLB1 handling */
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tlb1_init(bootinfo->bi_bar_base);
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/* Reset Time Base */
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mttb(0);
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/* Init params/tunables that can be overridden by the loader. */
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init_param1();
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/* Start initializing proc0 and thread0. */
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proc_linkup0(&proc0, &thread0);
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thread0.td_frame = &frame0;
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/* Set up per-cpu data and store the pointer in SPR general 0. */
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pc = &__pcpu[0];
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pcpu_init(pc, 0, sizeof(struct pcpu));
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pc->pc_curthread = &thread0;
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__asm __volatile("mtsprg 0, %0" :: "r"(pc));
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/* Initialize system mutexes. */
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mutex_init();
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/* Initialize the console before printing anything. */
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cninit();
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/* Print out some debug info... */
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debugf("e500_init: console initialized\n");
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debugf(" arg1 startkernel = 0x%08x\n", startkernel);
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debugf(" arg2 endkernel = 0x%08x\n", endkernel);
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debugf(" arg3 mdp = 0x%08x\n", (u_int32_t)mdp);
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debugf(" end = 0x%08x\n", (u_int32_t)end);
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debugf(" boothowto = 0x%08x\n", boothowto);
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debugf(" kernel ccsrbar = 0x%08x\n", CCSRBAR_VA);
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debugf(" MSR = 0x%08x\n", mfmsr());
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debugf(" HID0 = 0x%08x\n", mfspr(SPR_HID0));
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debugf(" HID1 = 0x%08x\n", mfspr(SPR_HID1));
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debugf(" BUCSR = 0x%08x\n", mfspr(SPR_BUCSR));
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__asm __volatile("msync; isync");
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csr = ccsr_read4(OCP85XX_L2CTL);
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debugf(" L2CTL = 0x%08x\n", csr);
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print_bootinfo();
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print_kernel_section_addr();
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print_kenv();
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//tlb1_print_entries();
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//tlb1_print_tlbentries();
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kdb_init();
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#ifdef KDB
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if (boothowto & RB_KDB)
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kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
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#endif
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/* Initialise platform module */
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platform_probe_and_attach();
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/* Initialise virtual memory. */
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pmap_mmu_install(MMU_TYPE_BOOKE, 0);
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pmap_bootstrap(startkernel, end);
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debugf("MSR = 0x%08x\n", mfmsr());
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//tlb1_print_entries();
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//tlb1_print_tlbentries();
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/* Initialize params/tunables that are derived from memsize. */
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init_param2(physmem);
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/* Finish setting up thread0. */
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thread0.td_pcb = (struct pcb *)
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((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
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sizeof(struct pcb)) & ~15);
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bzero((void *)thread0.td_pcb, sizeof(struct pcb));
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pc->pc_curpcb = thread0.td_pcb;
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/* Initialise the message buffer. */
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msgbufinit(msgbufp, MSGBUF_SIZE);
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/* Enable Machine Check interrupt. */
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mtmsr(mfmsr() | PSL_ME);
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isync();
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/* Enable D-cache if applicable */
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csr = mfspr(SPR_L1CSR0);
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if ((csr & L1CSR0_DCE) == 0) {
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dcache_inval();
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dcache_enable();
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}
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csr = mfspr(SPR_L1CSR0);
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if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0)
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printf("L1 D-cache %sabled\n",
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(csr & L1CSR0_DCE) ? "en" : "dis");
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/* Enable L1 I-cache if applicable. */
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csr = mfspr(SPR_L1CSR1);
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if ((csr & L1CSR1_ICE) == 0) {
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icache_inval();
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icache_enable();
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}
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csr = mfspr(SPR_L1CSR1);
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if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0)
|
|
printf("L1 I-cache %sabled\n",
|
|
(csr & L1CSR1_ICE) ? "en" : "dis");
|
|
|
|
debugf("e500_init: SP = 0x%08x\n", ((uintptr_t)thread0.td_pcb - 16) & ~15);
|
|
debugf("e500_init: e\n");
|
|
|
|
return (((uintptr_t)thread0.td_pcb - 16) & ~15);
|
|
}
|
|
|
|
#define RES_GRANULE 32
|
|
extern uint32_t tlb0_miss_locks[];
|
|
|
|
/* Initialise a struct pcpu. */
|
|
void
|
|
cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
|
|
{
|
|
|
|
pcpu->pc_tid_next = TID_MIN;
|
|
|
|
#ifdef SMP
|
|
uint32_t *ptr;
|
|
int words_per_gran = RES_GRANULE / sizeof(uint32_t);
|
|
|
|
ptr = &tlb0_miss_locks[cpuid * words_per_gran];
|
|
pcpu->pc_booke_tlb_lock = ptr;
|
|
*ptr = MTX_UNOWNED;
|
|
*(ptr + 1) = 0; /* recurse counter */
|
|
#endif
|
|
}
|
|
|
|
/* Set set up registers on exec. */
|
|
void
|
|
exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
|
|
{
|
|
struct trapframe *tf;
|
|
struct ps_strings arginfo;
|
|
|
|
tf = trapframe(td);
|
|
bzero(tf, sizeof *tf);
|
|
tf->fixreg[1] = -roundup(-stack + 8, 16);
|
|
|
|
/*
|
|
* XXX Machine-independent code has already copied arguments and
|
|
* XXX environment to userland. Get them back here.
|
|
*/
|
|
(void)copyin((char *)PS_STRINGS, &arginfo, sizeof(arginfo));
|
|
|
|
/*
|
|
* Set up arguments for _start():
|
|
* _start(argc, argv, envp, obj, cleanup, ps_strings);
|
|
*
|
|
* Notes:
|
|
* - obj and cleanup are the auxilliary and termination
|
|
* vectors. They are fixed up by ld.elf_so.
|
|
* - ps_strings is a NetBSD extention, and will be
|
|
* ignored by executables which are strictly
|
|
* compliant with the SVR4 ABI.
|
|
*
|
|
* XXX We have to set both regs and retval here due to different
|
|
* XXX calling convention in trap.c and init_main.c.
|
|
*/
|
|
/*
|
|
* XXX PG: these get overwritten in the syscall return code.
|
|
* execve() should return EJUSTRETURN, like it does on NetBSD.
|
|
* Emulate by setting the syscall return value cells. The
|
|
* registers still have to be set for init's fork trampoline.
|
|
*/
|
|
td->td_retval[0] = arginfo.ps_nargvstr;
|
|
td->td_retval[1] = (register_t)arginfo.ps_argvstr;
|
|
tf->fixreg[3] = arginfo.ps_nargvstr;
|
|
tf->fixreg[4] = (register_t)arginfo.ps_argvstr;
|
|
tf->fixreg[5] = (register_t)arginfo.ps_envstr;
|
|
tf->fixreg[6] = 0; /* auxillary vector */
|
|
tf->fixreg[7] = 0; /* termination vector */
|
|
tf->fixreg[8] = (register_t)PS_STRINGS; /* NetBSD extension */
|
|
|
|
tf->srr0 = entry;
|
|
tf->srr1 = PSL_USERSET;
|
|
td->td_pcb->pcb_flags = 0;
|
|
}
|
|
|
|
int
|
|
fill_regs(struct thread *td, struct reg *regs)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
memcpy(regs, tf, sizeof(struct reg));
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
fill_fpregs(struct thread *td, struct fpreg *fpregs)
|
|
{
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Flush the D-cache for non-DMA I/O so that the I-cache can
|
|
* be made coherent later.
|
|
*/
|
|
void
|
|
cpu_flush_dcache(void *ptr, size_t len)
|
|
{
|
|
/* TBD */
|
|
}
|
|
|
|
/*
|
|
* Construct a PCB from a trapframe. This is called from kdb_trap() where
|
|
* we want to start a backtrace from the function that caused us to enter
|
|
* the debugger. We have the context in the trapframe, but base the trace
|
|
* on the PCB. The PCB doesn't have to be perfect, as long as it contains
|
|
* enough for a backtrace.
|
|
*/
|
|
void
|
|
makectx(struct trapframe *tf, struct pcb *pcb)
|
|
{
|
|
|
|
pcb->pcb_lr = tf->srr0;
|
|
pcb->pcb_sp = tf->fixreg[1];
|
|
}
|
|
|
|
/*
|
|
* get_mcontext/sendsig helper routine that doesn't touch the
|
|
* proc lock.
|
|
*/
|
|
static int
|
|
grab_mcontext(struct thread *td, mcontext_t *mcp, int flags)
|
|
{
|
|
struct pcb *pcb;
|
|
|
|
pcb = td->td_pcb;
|
|
memset(mcp, 0, sizeof(mcontext_t));
|
|
|
|
mcp->mc_vers = _MC_VERSION;
|
|
mcp->mc_flags = 0;
|
|
memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe));
|
|
if (flags & GET_MC_CLEAR_RET) {
|
|
mcp->mc_gpr[3] = 0;
|
|
mcp->mc_gpr[4] = 0;
|
|
}
|
|
|
|
/* XXX Altivec context ? */
|
|
|
|
mcp->mc_len = sizeof(*mcp);
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
|
|
{
|
|
int error;
|
|
|
|
error = grab_mcontext(td, mcp, flags);
|
|
if (error == 0) {
|
|
PROC_LOCK(curthread->td_proc);
|
|
mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]);
|
|
PROC_UNLOCK(curthread->td_proc);
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
set_mcontext(struct thread *td, const mcontext_t *mcp)
|
|
{
|
|
struct pcb *pcb;
|
|
struct trapframe *tf;
|
|
|
|
pcb = td->td_pcb;
|
|
tf = td->td_frame;
|
|
|
|
if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp))
|
|
return (EINVAL);
|
|
|
|
memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame));
|
|
|
|
/* XXX Altivec context? */
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
sigreturn(struct thread *td, struct sigreturn_args *uap)
|
|
{
|
|
ucontext_t uc;
|
|
int error;
|
|
|
|
CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp);
|
|
|
|
if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) {
|
|
CTR1(KTR_SIG, "sigreturn: efault td=%p", td);
|
|
return (EFAULT);
|
|
}
|
|
|
|
error = set_mcontext(td, &uc.uc_mcontext);
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
|
|
|
|
CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x",
|
|
td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]);
|
|
|
|
return (EJUSTRETURN);
|
|
}
|
|
|
|
#ifdef COMPAT_FREEBSD4
|
|
int
|
|
freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
|
|
{
|
|
|
|
return sigreturn(td, (struct sigreturn_args *)uap);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* cpu_idle
|
|
*
|
|
* Set Wait state enable.
|
|
*/
|
|
void
|
|
cpu_idle (int busy)
|
|
{
|
|
register_t msr;
|
|
|
|
msr = mfmsr();
|
|
#ifdef INVARIANTS
|
|
if ((msr & PSL_EE) != PSL_EE) {
|
|
struct thread *td = curthread;
|
|
printf("td msr %x\n", td->td_md.md_saved_msr);
|
|
panic("ints disabled in idleproc!");
|
|
}
|
|
#endif
|
|
#if 0
|
|
/*
|
|
* Freescale E500 core RM section 6.4.1
|
|
*/
|
|
msr = msr | PSL_WE;
|
|
|
|
__asm__(" msync;"
|
|
" mtmsr %0;"
|
|
" isync;"
|
|
"loop: b loop" :
|
|
/* no output */ :
|
|
"r" (msr));
|
|
#endif
|
|
}
|
|
|
|
int
|
|
cpu_idle_wakeup(int cpu)
|
|
{
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
spinlock_enter(void)
|
|
{
|
|
struct thread *td;
|
|
|
|
td = curthread;
|
|
if (td->td_md.md_spinlock_count == 0)
|
|
td->td_md.md_saved_msr = intr_disable();
|
|
td->td_md.md_spinlock_count++;
|
|
critical_enter();
|
|
}
|
|
|
|
void
|
|
spinlock_exit(void)
|
|
{
|
|
struct thread *td;
|
|
|
|
td = curthread;
|
|
critical_exit();
|
|
td->td_md.md_spinlock_count--;
|
|
if (td->td_md.md_spinlock_count == 0)
|
|
intr_restore(td->td_md.md_saved_msr);
|
|
}
|
|
|
|
/* Shutdown the CPU as much as possible. */
|
|
void
|
|
cpu_halt(void)
|
|
{
|
|
|
|
mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
|
|
while (1);
|
|
}
|
|
|
|
int
|
|
set_regs(struct thread *td, struct reg *regs)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
memcpy(tf, regs, sizeof(struct reg));
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
fill_dbregs(struct thread *td, struct dbreg *dbregs)
|
|
{
|
|
|
|
/* No debug registers on PowerPC */
|
|
return (ENOSYS);
|
|
}
|
|
|
|
int
|
|
set_dbregs(struct thread *td, struct dbreg *dbregs)
|
|
{
|
|
|
|
/* No debug registers on PowerPC */
|
|
return (ENOSYS);
|
|
}
|
|
|
|
int
|
|
set_fpregs(struct thread *td, struct fpreg *fpregs)
|
|
{
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ptrace_set_pc(struct thread *td, unsigned long addr)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr0 = (register_t)addr;
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ptrace_single_step(struct thread *td)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr1 |= PSL_DE;
|
|
tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ptrace_clear_single_step(struct thread *td)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr1 &= ~PSL_DE;
|
|
tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
kdb_cpu_clear_singlestep(void)
|
|
{
|
|
register_t r;
|
|
|
|
r = mfspr(SPR_DBCR0);
|
|
mtspr(SPR_DBCR0, r & ~DBCR0_IC);
|
|
kdb_frame->srr1 &= ~PSL_DE;
|
|
}
|
|
|
|
void
|
|
kdb_cpu_set_singlestep(void)
|
|
{
|
|
register_t r;
|
|
|
|
r = mfspr(SPR_DBCR0);
|
|
mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
|
|
kdb_frame->srr1 |= PSL_DE;
|
|
}
|
|
|
|
void
|
|
sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
|
|
{
|
|
struct trapframe *tf;
|
|
struct sigframe *sfp;
|
|
struct sigacts *psp;
|
|
struct sigframe sf;
|
|
struct thread *td;
|
|
struct proc *p;
|
|
int oonstack, rndfsize;
|
|
int sig, code;
|
|
|
|
td = curthread;
|
|
p = td->td_proc;
|
|
PROC_LOCK_ASSERT(p, MA_OWNED);
|
|
sig = ksi->ksi_signo;
|
|
code = ksi->ksi_code;
|
|
psp = p->p_sigacts;
|
|
mtx_assert(&psp->ps_mtx, MA_OWNED);
|
|
tf = td->td_frame;
|
|
oonstack = sigonstack(tf->fixreg[1]);
|
|
|
|
rndfsize = ((sizeof(sf) + 15) / 16) * 16;
|
|
|
|
CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
|
|
catcher, sig);
|
|
|
|
/*
|
|
* Save user context
|
|
*/
|
|
memset(&sf, 0, sizeof(sf));
|
|
grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
|
|
sf.sf_uc.uc_sigmask = *mask;
|
|
sf.sf_uc.uc_stack = td->td_sigstk;
|
|
sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
|
|
? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
|
|
|
|
sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
|
|
|
|
/*
|
|
* Allocate and validate space for the signal handler context.
|
|
*/
|
|
if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
|
|
SIGISMEMBER(psp->ps_sigonstack, sig)) {
|
|
sfp = (struct sigframe *)((caddr_t)td->td_sigstk.ss_sp +
|
|
td->td_sigstk.ss_size - rndfsize);
|
|
} else {
|
|
sfp = (struct sigframe *)(tf->fixreg[1] - rndfsize);
|
|
}
|
|
|
|
/*
|
|
* Translate the signal if appropriate (Linux emu ?)
|
|
*/
|
|
if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
|
|
sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
|
|
|
|
/*
|
|
* Save the floating-point state, if necessary, then copy it.
|
|
*/
|
|
/* XXX */
|
|
|
|
/*
|
|
* Set up the registers to return to sigcode.
|
|
*
|
|
* r1/sp - sigframe ptr
|
|
* lr - sig function, dispatched to by blrl in trampoline
|
|
* r3 - sig number
|
|
* r4 - SIGINFO ? &siginfo : exception code
|
|
* r5 - user context
|
|
* srr0 - trampoline function addr
|
|
*/
|
|
tf->lr = (register_t)catcher;
|
|
tf->fixreg[1] = (register_t)sfp;
|
|
tf->fixreg[FIRSTARG] = sig;
|
|
tf->fixreg[FIRSTARG+2] = (register_t)&sfp->sf_uc;
|
|
if (SIGISMEMBER(psp->ps_siginfo, sig)) {
|
|
/*
|
|
* Signal handler installed with SA_SIGINFO.
|
|
*/
|
|
tf->fixreg[FIRSTARG+1] = (register_t)&sfp->sf_si;
|
|
|
|
/*
|
|
* Fill siginfo structure.
|
|
*/
|
|
sf.sf_si = ksi->ksi_info;
|
|
sf.sf_si.si_signo = sig;
|
|
sf.sf_si.si_addr = (void *) ((tf->exc == EXC_DSI) ?
|
|
tf->cpu.booke.dear : tf->srr0);
|
|
} else {
|
|
/* Old FreeBSD-style arguments. */
|
|
tf->fixreg[FIRSTARG+1] = code;
|
|
tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ?
|
|
tf->cpu.booke.dear : tf->srr0;
|
|
}
|
|
mtx_unlock(&psp->ps_mtx);
|
|
PROC_UNLOCK(p);
|
|
|
|
tf->srr0 = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
|
|
|
|
/*
|
|
* copy the frame out to userland.
|
|
*/
|
|
if (copyout((caddr_t)&sf, (caddr_t)sfp, sizeof(sf)) != 0) {
|
|
/*
|
|
* Process has trashed its stack. Kill it.
|
|
*/
|
|
CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp);
|
|
PROC_LOCK(p);
|
|
sigexit(td, SIGILL);
|
|
}
|
|
|
|
CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td,
|
|
tf->srr0, tf->fixreg[1]);
|
|
|
|
PROC_LOCK(p);
|
|
mtx_lock(&psp->ps_mtx);
|
|
}
|
|
|
|
void
|
|
bzero(void *buf, size_t len)
|
|
{
|
|
caddr_t p;
|
|
|
|
p = buf;
|
|
|
|
while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
|
|
*p++ = 0;
|
|
len--;
|
|
}
|
|
|
|
while (len >= sizeof(u_long) * 8) {
|
|
*(u_long*) p = 0;
|
|
*((u_long*) p + 1) = 0;
|
|
*((u_long*) p + 2) = 0;
|
|
*((u_long*) p + 3) = 0;
|
|
len -= sizeof(u_long) * 8;
|
|
*((u_long*) p + 4) = 0;
|
|
*((u_long*) p + 5) = 0;
|
|
*((u_long*) p + 6) = 0;
|
|
*((u_long*) p + 7) = 0;
|
|
p += sizeof(u_long) * 8;
|
|
}
|
|
|
|
while (len >= sizeof(u_long)) {
|
|
*(u_long*) p = 0;
|
|
len -= sizeof(u_long);
|
|
p += sizeof(u_long);
|
|
}
|
|
|
|
while (len) {
|
|
*p++ = 0;
|
|
len--;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* XXX what is the better/proper place for this routine?
|
|
*/
|
|
int
|
|
mem_valid(vm_offset_t addr, int len)
|
|
{
|
|
|
|
return (1);
|
|
}
|