19b7ffd1b8
tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
793 lines
19 KiB
C
793 lines
19 KiB
C
/*
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* Copyright (c) 2000 Matthew Jacob
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <sys/interrupt.h>
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#include <machine/swiz.h>
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#include <machine/intr.h>
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#include <machine/intrcnt.h>
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#include <machine/resource.h>
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#include <machine/sgmap.h>
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#include <machine/prom.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#include <alpha/mcbus/mcbusreg.h>
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#include <alpha/mcbus/mcbusvar.h>
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#include <alpha/mcbus/mcpciareg.h>
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#include <alpha/mcbus/mcpciavar.h>
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#include <alpha/pci/pcibus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include "alphapci_if.h"
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#include "pcib_if.h"
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static devclass_t mcpcia_devclass;
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/* We're only allowing for one MCBUS right now */
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static device_t mcpcias[MCPCIA_PER_MCBUS];
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#define KV(pa) ((void *)ALPHA_PHYS_TO_K0SEG(pa))
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struct mcpcia_softc {
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struct mcpcia_softc *next;
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device_t dev; /* backpointer */
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u_int64_t sysbase; /* shorthand */
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vm_offset_t dmem_base; /* dense memory */
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vm_offset_t smem_base; /* sparse memory */
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vm_offset_t io_base; /* sparse i/o */
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int mcpcia_inst; /* our mcpcia instance # */
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struct swiz_space io_space; /* accessor for ports */
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struct swiz_space mem_space; /* accessor for memory */
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struct rman io_rman; /* resource manager for ports */
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struct rman mem_rman; /* resource manager for memory */
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};
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static struct mcpcia_softc *mcpcia_eisa = NULL;
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extern void dec_kn300_cons_init(void);
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static driver_intr_t mcpcia_intr;
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static void mcpcia_enable_intr(struct mcpcia_softc *, int);
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static void mcpcia_disable_intr(struct mcpcia_softc *, int);
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/*
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* SGMAP window for ISA: 8M at 8M
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*/
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#define MCPCIA_ISA_SG_MAPPED_BASE (8*1024*1024)
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#define MCPCIA_ISA_SG_MAPPED_SIZE (8*1024*1024)
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/*
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* Direct-mapped window: 2G at 2G
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*/
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#define MCPCIA_DIRECT_MAPPED_BASE (2UL*1024UL*1024UL*1024UL)
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#define MCPCIA_DIRECT_MAPPED_SIZE (2UL*1024UL*1024UL*1024UL)
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/*
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* SGMAP window for PCI: 1G at 1G
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*/
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#define MCPCIA_PCI_SG_MAPPED_BASE (1UL*1024UL*1024UL*1024UL)
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#define MCPCIA_PCI_SG_MAPPED_SIZE (1UL*1024UL*1024UL*1024UL)
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#define MCPCIA_SGTLB_INVALIDATE(sc) \
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do { \
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alpha_mb(); \
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REGVAL(MCPCIA_SG_TBIA(sc)) = 0xdeadbeef; \
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alpha_mb(); \
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} while (0)
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static void mcpcia_dma_init(struct mcpcia_softc *);
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static void mcpcia_sgmap_map(void *, bus_addr_t, vm_offset_t);
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#define MCPCIA_SOFTC(dev) (struct mcpcia_softc *) device_get_softc(dev)
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static struct mcpcia_softc *mcpcia_root;
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/*
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* Early console support requires us to partially probe the bus to
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* find the ISA bus resources.
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*/
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void
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mcpcia_init(int gid, int mid)
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{
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static struct swiz_space io_space;
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static struct swiz_space mem_space;
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u_int64_t sysbase;
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vm_offset_t regs, io_base, smem_base;
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sysbase = MCBUS_IOSPACE |
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(((u_int64_t) gid) << MCBUS_GID_SHIFT) |
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(((u_int64_t) mid) << MCBUS_MID_SHIFT);
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if (EISA_PRESENT(REGVAL(sysbase
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| MCPCIA_PCI_BRIDGE
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| _MCPCIA_PCI_REV))) {
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/*
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* Define temporary spaces for bootstrap i/o.
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*/
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regs = (vm_offset_t) KV(sysbase);
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io_base = regs + MCPCIA_PCI_IOSPACE;
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smem_base = regs + MCPCIA_PCI_SPARSE;
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swiz_init_space(&io_space, io_base);
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swiz_init_space(&mem_space, smem_base);
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busspace_isa_io = (struct alpha_busspace *) &io_space;
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busspace_isa_mem = (struct alpha_busspace *) &mem_space;
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}
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}
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static int
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mcpcia_probe(device_t dev)
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{
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device_t child;
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int unit;
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struct mcpcia_softc *xc, *sc = MCPCIA_SOFTC(dev);
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unit = device_get_unit(dev);
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if (mcpcias[unit]) {
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printf("%s: already attached\n", device_get_nameunit(dev));
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return EEXIST;
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}
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sc->mcpcia_inst = unit;
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if ((xc = mcpcia_root) == NULL) {
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mcpcia_root = sc;
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} else {
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while (xc->next)
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xc = xc->next;
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xc->next = sc;
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}
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sc->dev = mcpcias[unit] = dev;
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/* PROBE ? */
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device_set_desc(dev, "MCPCIA PCI Adapter");
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if (unit == 0) {
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pci_init_resources();
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}
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child = device_add_child(dev, "pci", -1);
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device_set_ivars(child, &sc->mcpcia_inst);
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return (0);
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}
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static int
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mcpcia_attach(device_t dev)
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{
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struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
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device_t p = device_get_parent(dev);
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vm_offset_t regs;
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u_int32_t ctl;
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int mid, gid, rval;
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void *intr;
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mid = mcbus_get_mid(dev);
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gid = mcbus_get_gid(dev);
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sc->sysbase = MCBUS_IOSPACE |
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(((u_int64_t) gid) << MCBUS_GID_SHIFT) | \
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(((u_int64_t) mid) << MCBUS_MID_SHIFT);
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regs = (vm_offset_t) KV(sc->sysbase);
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sc->dmem_base = regs + MCPCIA_PCI_DENSE;
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sc->smem_base = regs + MCPCIA_PCI_SPARSE;
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sc->io_base = regs + MCPCIA_PCI_IOSPACE;
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swiz_init_space(&sc->io_space, sc->io_base);
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swiz_init_space(&sc->mem_space, sc->smem_base);
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sc->io_rman.rm_start = 0;
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sc->io_rman.rm_end = ~0u;
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sc->io_rman.rm_type = RMAN_ARRAY;
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sc->io_rman.rm_descr = "I/O ports";
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if (rman_init(&sc->io_rman)
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|| rman_manage_region(&sc->io_rman, 0x0, (1L << 32)))
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panic("mcpcia_attach: io_rman");
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sc->mem_rman.rm_start = 0;
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sc->mem_rman.rm_end = ~0u;
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sc->mem_rman.rm_type = RMAN_ARRAY;
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sc->mem_rman.rm_descr = "I/O memory";
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if (rman_init(&sc->mem_rman)
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|| rman_manage_region(&sc->mem_rman, 0x0, (1L << 32)))
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panic("mcpcia_attach: mem_rman");
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/*
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* Disable interrupts and clear errors prior to probing
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*/
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REGVAL(MCPCIA_INT_MASK0(sc)) = 0;
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REGVAL(MCPCIA_INT_MASK1(sc)) = 0;
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REGVAL(MCPCIA_CAP_ERR(sc)) = 0xFFFFFFFF;
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alpha_mb();
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/*
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* Say who we are
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*/
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ctl = REGVAL(MCPCIA_PCI_REV(sc));
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printf("%s: Horse Revision %d, %s Handed Saddle Revision %d,"
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" CAP Revision %d\n", device_get_nameunit(dev), HORSE_REV(ctl),
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(SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl),
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CAP_REV(ctl));
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/*
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* See if we're the fella with the EISA bus...
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*/
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if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(sc)))) {
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mcpcia_eisa = sc;
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}
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/*
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* Set up DMA stuff here.
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*/
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mcpcia_dma_init(sc);
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/*
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* Register our interrupt service requirements with our parent.
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*/
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rval =
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BUS_SETUP_INTR(p, dev, NULL, INTR_TYPE_MISC, mcpcia_intr, 0, &intr);
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if (rval == 0) {
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if (sc == mcpcia_eisa) {
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busspace_isa_io = (struct alpha_busspace *)
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&sc->io_space;
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busspace_isa_mem = (struct alpha_busspace *)
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&sc->mem_space;
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/*
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* Enable EISA interrupts.
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*/
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mcpcia_enable_intr(sc, 16);
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}
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bus_generic_attach(dev);
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}
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return (rval);
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}
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static void
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mcpcia_enable_intr(struct mcpcia_softc *sc, int irq)
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{
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REGVAL(MCPCIA_INT_MASK0(sc)) |= (1 << irq);
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alpha_mb();
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}
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static void
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mcpcia_disable_intr(struct mcpcia_softc *sc, int irq)
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{
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/*
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* We need to write to INT_REQ as well as INT_MASK0 in case we
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* are trying to mask an interrupt which is already
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* asserted. Writing a 1 bit to INT_REQ clears the
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* corresponding bit in the register.
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*/
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REGVAL(MCPCIA_INT_MASK0(sc)) &= ~(1 << irq);
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REGVAL(MCPCIA_INT_REQ(sc)) = (1 << irq);
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alpha_mb();
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}
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static void
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mcpcia_disable_intr_vec(int vector)
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{
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int mid, irq;
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struct mcpcia_softc *sc = mcpcia_root;
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if (vector < MCPCIA_VEC_PCI) {
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printf("EISA disable (0x%x)\n", vector);
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return;
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}
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if (vector == MCPCIA_VEC_NCR) {
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mid = 5;
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irq = 16;
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} else {
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int tmp, slot;
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tmp = vector - MCPCIA_VEC_PCI;
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mid = (tmp / MCPCIA_VECWIDTH_PER_MCPCIA) + 4;
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tmp &= (MCPCIA_VECWIDTH_PER_MCPCIA - 1);
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slot = tmp / MCPCIA_VECWIDTH_PER_SLOT;
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if (slot < 2 || slot > 5) {
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printf("Bad slot (%d) for vector %x\n", slot, vector);
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return;
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}
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tmp -= (2 * MCPCIA_VECWIDTH_PER_SLOT);
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irq = (tmp >> MCPCIA_VECWIDTH_PER_INTPIN) & 0xf;
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}
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/* printf("D<%03x>=%d,%d\n", vector, mid, irq); */
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while (sc) {
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if (mcbus_get_mid(sc->dev) == mid) {
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break;
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}
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sc = sc->next;
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}
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if (sc == NULL) {
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panic("couldn't find MCPCIA softc for vector 0x%x", vector);
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}
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mtx_lock_spin(&icu_lock);
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mcpcia_disable_intr(sc, irq);
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mtx_unlock_spin(&icu_lock);
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}
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static void
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mcpcia_enable_intr_vec(int vector)
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{
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int mid, irq;
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struct mcpcia_softc *sc = mcpcia_root;
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if (vector < MCPCIA_VEC_PCI) {
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printf("EISA ensable (0x%x)\n", vector);
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return;
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}
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if (vector == MCPCIA_VEC_NCR) {
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mid = 5;
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irq = 16;
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} else {
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int tmp, slot;
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tmp = vector - MCPCIA_VEC_PCI;
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mid = (tmp / MCPCIA_VECWIDTH_PER_MCPCIA) + 4;
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tmp &= (MCPCIA_VECWIDTH_PER_MCPCIA - 1);
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slot = tmp / MCPCIA_VECWIDTH_PER_SLOT;
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if (slot < 2 || slot > 5) {
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printf("Bad slot (%d) for vector %x\n", slot, vector);
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return;
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}
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tmp -= (2 * MCPCIA_VECWIDTH_PER_SLOT);
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irq = (tmp >> MCPCIA_VECWIDTH_PER_INTPIN) & 0xf;
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}
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/* printf("E<%03x>=%d,%d\n", vector, mid, irq); */
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while (sc) {
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if (mcbus_get_mid(sc->dev) == mid) {
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break;
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}
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sc = sc->next;
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}
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if (sc == NULL) {
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panic("couldn't find MCPCIA softc for vector 0x%x", vector);
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}
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mtx_lock_spin(&icu_lock);
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mcpcia_enable_intr(sc, irq);
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mtx_unlock_spin(&icu_lock);
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}
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static int
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mcpcia_pci_route_interrupt(device_t bus, device_t dev, int pin)
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{
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int irq, slot, mid;
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/*
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* Validate requested pin number.
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*/
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if ((pin < 1) || (pin > 4)) {
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printf("mcpcia_pci_route_interrupt: bad interrupt pin %d\n",
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pin);
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return(255);
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}
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slot = pci_get_slot(dev);
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mid = mcbus_get_mid(bus);
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#if 0
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printf("mcpcia_pci_route_interrupt: called for slot=%d, pin=%d, mid=%d\n", slot, pin, mid);
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#endif
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if (mid == 5 && slot == 1) {
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irq = 16; /* MID 5, slot 1, is the internal NCR 53c810 */
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} else if (slot >= 2 && slot <= 5) {
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irq = ((slot - 2) * 4) + (pin - 1);
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} else {
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printf("mcpcia_pci_route_interrupt: weird device number %d\n",
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slot);
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return (255);
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}
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return(irq);
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}
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static int
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mcpcia_setup_intr(device_t dev, device_t child, struct resource *ir, int flags,
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driver_intr_t *intr, void *arg, void **cp)
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{
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struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
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int mid, birq, irq, error, h;
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irq = ir->r_start;
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mid = mcbus_get_mid(dev);
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error = rman_activate_resource(ir);
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if (error)
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return error;
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/*
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* We now construct a vector as the hardware would, unless
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* this is the internal NCR 53c810 interrupt.
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*/
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if (irq == 16) {
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h = MCPCIA_VEC_NCR;
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} else {
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h = MCPCIA_VEC_PCI +
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((mid - MCPCIA_PCI_MIDMIN) * MCPCIA_VECWIDTH_PER_MCPCIA) +
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irq * MCPCIA_VECWIDTH_PER_INTPIN +
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2 * MCPCIA_VECWIDTH_PER_SLOT;
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}
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birq = irq + INTRCNT_KN300_IRQ;
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error = alpha_setup_intr(device_get_nameunit(child), h,
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intr, arg, flags, cp, &intrcnt[birq],
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mcpcia_disable_intr_vec, mcpcia_enable_intr_vec);
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if (error)
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return error;
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mtx_lock_spin(&icu_lock);
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mcpcia_enable_intr(sc, irq);
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mtx_unlock_spin(&icu_lock);
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device_printf(child, "interrupting at IRQ 0x%x (vec 0x%x)\n",
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irq , h);
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return (0);
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}
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static int
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mcpcia_teardown_intr(device_t dev, device_t child, struct resource *i, void *c)
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{
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struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
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mtx_lock_spin(&icu_lock);
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mcpcia_disable_intr(sc, i->r_start);
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mtx_unlock_spin(&icu_lock);
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alpha_teardown_intr(c);
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return (rman_deactivate_resource(i));
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}
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static int
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mcpcia_read_ivar(device_t dev, device_t child, int which, u_long *result)
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{
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switch (which) {
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case PCIB_IVAR_BUS:
|
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*result = 0;
|
|
return 0;
|
|
}
|
|
return ENOENT;
|
|
}
|
|
|
|
static void *
|
|
mcpcia_cvt_dense(device_t dev, vm_offset_t addr)
|
|
{
|
|
struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
|
|
|
|
addr &= 0xffffffffUL;
|
|
return (void *) KV(addr | sc->dmem_base);
|
|
|
|
}
|
|
|
|
static struct alpha_busspace *
|
|
mcpcia_get_bustag(device_t dev, int type)
|
|
{
|
|
struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT:
|
|
return (struct alpha_busspace *) &sc->io_space;
|
|
|
|
case SYS_RES_MEMORY:
|
|
return (struct alpha_busspace *) &sc->mem_space;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct rman *
|
|
mcpcia_get_rman(device_t dev, int type)
|
|
{
|
|
struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT:
|
|
return &sc->io_rman;
|
|
|
|
case SYS_RES_MEMORY:
|
|
return &sc->mem_rman;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
mcpcia_maxslots(device_t dev)
|
|
{
|
|
return (MCPCIA_MAXDEV);
|
|
}
|
|
|
|
static u_int32_t
|
|
mcpcia_read_config(device_t dev, int bus, int slot, int func,
|
|
int off, int sz)
|
|
{
|
|
struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
|
|
u_int32_t *dp, data, rvp;
|
|
u_int64_t paddr;
|
|
|
|
if ((off == PCIR_INTLINE) && (sz == 1)) {
|
|
/* SRM left bad value; let intr_route fill them in later */
|
|
return ~0;
|
|
}
|
|
|
|
rvp = data = ~0;
|
|
|
|
/*
|
|
* There's nothing in slot 0 on a primary bus.
|
|
*/
|
|
if (bus == 0 && (slot < 1 || slot >= MCPCIA_MAXDEV))
|
|
return (data);
|
|
|
|
paddr = bus << 21;
|
|
paddr |= slot << 16;
|
|
paddr |= func << 13;
|
|
paddr |= ((sz - 1) << 3);
|
|
paddr |= ((unsigned long) ((off >> 2) << 7));
|
|
paddr |= MCPCIA_PCI_CONF;
|
|
paddr |= sc->sysbase;
|
|
dp = (u_int32_t *)KV(paddr);
|
|
|
|
#if 0
|
|
printf("CFGREAD MID %d %d.%d.%d sz %d off %d -> paddr 0x%x",
|
|
mcbus_get_mid(dev), bus , slot, func, sz, off, paddr);
|
|
#endif
|
|
if (badaddr(dp, sizeof (*dp)) == 0) {
|
|
data = *dp;
|
|
}
|
|
if (data != ~0) {
|
|
if (sz == 1) {
|
|
rvp = SPARSE_BYTE_EXTRACT(off, data);
|
|
} else if (sz == 2) {
|
|
rvp = SPARSE_WORD_EXTRACT(off, data);
|
|
} else {
|
|
rvp = data;
|
|
}
|
|
} else {
|
|
rvp = data;
|
|
}
|
|
|
|
#if 0
|
|
printf(" data 0x%x -> 0x%x\n", data, rvp);
|
|
#endif
|
|
return (rvp);
|
|
}
|
|
|
|
static void
|
|
mcpcia_write_config(device_t dev, int bus, int slot, int func,
|
|
int off, u_int32_t data, int sz)
|
|
{
|
|
struct mcpcia_softc *sc = MCPCIA_SOFTC(dev);
|
|
u_int32_t *dp;
|
|
u_int64_t paddr;
|
|
|
|
/*
|
|
* There's nothing in slot 0 on a primary bus.
|
|
*/
|
|
if (bus != 0 && (slot < 1 || slot >= MCPCIA_MAXDEV))
|
|
return;
|
|
|
|
paddr = bus << 21;
|
|
paddr |= slot << 16;
|
|
paddr |= func << 13;
|
|
paddr |= ((sz - 1) << 3);
|
|
paddr |= ((unsigned long) ((off >> 2) << 7));
|
|
paddr |= MCPCIA_PCI_CONF;
|
|
paddr |= sc->sysbase;
|
|
dp = (u_int32_t *)KV(paddr);
|
|
|
|
if (badaddr(dp, sizeof (*dp)) == 0) {
|
|
u_int32_t new_data;
|
|
if (sz == 1) {
|
|
new_data = SPARSE_BYTE_INSERT(off, data);
|
|
} else if (sz == 2) {
|
|
new_data = SPARSE_WORD_INSERT(off, data);
|
|
} else {
|
|
new_data = data;
|
|
}
|
|
|
|
#if 0
|
|
printf("CFGWRITE MID%d %d.%d.%d sz %d off %d paddr %lx, data %x new_data %x\n",
|
|
mcbus_get_mid(dev), bus , slot, func, sz, off, paddr, data, new_data);
|
|
#endif
|
|
|
|
*dp = new_data;
|
|
}
|
|
}
|
|
|
|
static void
|
|
mcpcia_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
|
|
{
|
|
u_int64_t *sgtable = arg;
|
|
int index = alpha_btop(ba - MCPCIA_ISA_SG_MAPPED_BASE);
|
|
|
|
if (pa) {
|
|
if (pa > (1L<<32))
|
|
panic("mcpcia_sgmap_map: can't map address 0x%lx", pa);
|
|
sgtable[index] = ((pa >> 13) << 1) | 1;
|
|
} else {
|
|
sgtable[index] = 0;
|
|
}
|
|
alpha_mb();
|
|
MCPCIA_SGTLB_INVALIDATE(mcpcia_eisa);
|
|
}
|
|
|
|
static void
|
|
mcpcia_dma_init(struct mcpcia_softc *sc)
|
|
{
|
|
|
|
/*
|
|
* Disable all windows first.
|
|
*/
|
|
|
|
REGVAL(MCPCIA_W0_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_W1_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_W2_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_W3_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_T0_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_T1_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_T2_BASE(sc)) = 0;
|
|
REGVAL(MCPCIA_T3_BASE(sc)) = 0;
|
|
alpha_mb();
|
|
|
|
/*
|
|
* Set up window 0 as an 8MB SGMAP-mapped window starting at 8MB.
|
|
* Do this only for the EISA carrying MCPCIA. Partly because
|
|
* there's only one chipset sgmap thingie.
|
|
*/
|
|
|
|
if (sc == mcpcia_eisa) {
|
|
void *sgtable;
|
|
REGVAL(MCPCIA_W0_MASK(sc)) = MCPCIA_WMASK_8M;
|
|
|
|
sgtable = contigmalloc(8192, M_DEVBUF,
|
|
M_NOWAIT, 0, 1L<<34, 32<<10, 1L<<34);
|
|
|
|
if (sgtable == NULL) {
|
|
panic("mcpcia_dma_init: cannot allocate sgmap");
|
|
/* NOTREACHED */
|
|
}
|
|
REGVAL(MCPCIA_T0_BASE(sc)) =
|
|
pmap_kextract((vm_offset_t)sgtable) >> MCPCIA_TBASEX_SHIFT;
|
|
|
|
alpha_mb();
|
|
REGVAL(MCPCIA_W0_BASE(sc)) = MCPCIA_WBASE_EN |
|
|
MCPCIA_WBASE_SG | MCPCIA_ISA_SG_MAPPED_BASE;
|
|
alpha_mb();
|
|
MCPCIA_SGTLB_INVALIDATE(sc);
|
|
chipset.sgmap = sgmap_map_create(MCPCIA_ISA_SG_MAPPED_BASE,
|
|
MCPCIA_ISA_SG_MAPPED_BASE + MCPCIA_ISA_SG_MAPPED_SIZE - 1,
|
|
mcpcia_sgmap_map, sgtable);
|
|
}
|
|
|
|
/*
|
|
* Set up window 1 as a 2 GB Direct-mapped window starting at 2GB.
|
|
*/
|
|
|
|
REGVAL(MCPCIA_W1_MASK(sc)) = MCPCIA_WMASK_2G;
|
|
REGVAL(MCPCIA_T1_BASE(sc)) = 0;
|
|
alpha_mb();
|
|
REGVAL(MCPCIA_W1_BASE(sc)) =
|
|
MCPCIA_DIRECT_MAPPED_BASE | MCPCIA_WBASE_EN;
|
|
alpha_mb();
|
|
|
|
/*
|
|
* When we get around to redoing the 'chipset' stuff to have more
|
|
* than one sgmap handler...
|
|
*/
|
|
|
|
#if 0
|
|
/*
|
|
* Set up window 2 as a 1G SGMAP-mapped window starting at 1G.
|
|
*/
|
|
|
|
REGVAL(MCPCIA_W2_MASK(sc)) = MCPCIA_WMASK_1G;
|
|
REGVAL(MCPCIA_T2_BASE(sc)) =
|
|
ccp->cc_pci_sgmap.aps_ptpa >> MCPCIA_TBASEX_SHIFT;
|
|
alpha_mb();
|
|
REGVAL(MCPCIA_W2_BASE(sc)) =
|
|
MCPCIA_WBASE_EN | MCPCIA_WBASE_SG | MCPCIA_PCI_SG_MAPPED_BASE;
|
|
alpha_mb();
|
|
#endif
|
|
|
|
/* XXX XXX BEGIN XXX XXX */
|
|
{ /* XXX */
|
|
alpha_XXX_dmamap_or = MCPCIA_DIRECT_MAPPED_BASE;/* XXX */
|
|
} /* XXX */
|
|
/* XXX XXX END XXX XXX */
|
|
}
|
|
|
|
/*
|
|
*/
|
|
|
|
static void
|
|
mcpcia_intr(void *arg)
|
|
{
|
|
unsigned long vec = (unsigned long) arg;
|
|
|
|
/*
|
|
* Check for I2C interrupts. These are technically within
|
|
* the PCI vector range, but no PCI device should ever map
|
|
* to them.
|
|
*/
|
|
if (vec == MCPCIA_I2C_CVEC) {
|
|
printf("i2c: controller interrupt\n");
|
|
return;
|
|
}
|
|
if (vec == MCPCIA_I2C_BVEC) {
|
|
printf("i2c: bus interrupt\n");
|
|
return;
|
|
}
|
|
|
|
alpha_dispatch_intr(NULL, vec);
|
|
}
|
|
|
|
static device_method_t mcpcia_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, mcpcia_probe),
|
|
DEVMETHOD(device_attach, mcpcia_attach),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
|
DEVMETHOD(bus_read_ivar, mcpcia_read_ivar),
|
|
DEVMETHOD(bus_setup_intr, mcpcia_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, mcpcia_teardown_intr),
|
|
DEVMETHOD(bus_alloc_resource, alpha_pci_alloc_resource),
|
|
DEVMETHOD(bus_release_resource, pci_release_resource),
|
|
DEVMETHOD(bus_activate_resource, pci_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, pci_deactivate_resource),
|
|
|
|
/* alphapci interface */
|
|
DEVMETHOD(alphapci_cvt_dense, mcpcia_cvt_dense),
|
|
DEVMETHOD(alphapci_get_bustag, mcpcia_get_bustag),
|
|
DEVMETHOD(alphapci_get_rman, mcpcia_get_rman),
|
|
|
|
/* pcib interface */
|
|
DEVMETHOD(pcib_maxslots, mcpcia_maxslots),
|
|
DEVMETHOD(pcib_read_config, mcpcia_read_config),
|
|
DEVMETHOD(pcib_write_config, mcpcia_write_config),
|
|
DEVMETHOD(pcib_route_interrupt, mcpcia_pci_route_interrupt),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t mcpcia_driver = {
|
|
"pcib", mcpcia_methods, sizeof (struct mcpcia_softc)
|
|
};
|
|
|
|
DRIVER_MODULE(pcib, mcbus, mcpcia_driver, mcpcia_devclass, 0, 0);
|