Joseph Koshy 68c3e04122 Recognize Intel CPUs with Family 0x6, Models 0x1E and 0x1F. ...

Submitted by:	Marc Unangst <mju at panasas dot com>

2009-12-18 15:01:46 +00:00

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hwpmc_amd.c

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hwpmc_amd.h

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hwpmc_arm.c

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hwpmc_core.c

Only claim that the PMC_CLASS_IAF PMCs are supported by a CPU if

2009-10-24 01:58:10 +00:00

hwpmc_core.h

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hwpmc_ia64.c

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hwpmc_intel.c

Recognize Intel CPUs with Family 0x6, Models 0x1E and 0x1F.

2009-12-18 15:01:46 +00:00

hwpmc_logging.c

- fix a LOR between process lock and pmc thread mutex

2009-11-24 19:26:53 +00:00

hwpmc_mod.c

Use switch out (SWO) instead of switch in (SWI) debug log mask in csw_out.

2009-11-30 20:41:30 +00:00

hwpmc_pentium.c

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hwpmc_pentium.h

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hwpmc_piv.c

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hwpmc_piv.h

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hwpmc_powerpc.c

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hwpmc_ppro.c

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hwpmc_ppro.h

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hwpmc_sparc64.c

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hwpmc_tsc.c

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hwpmc_tsc.h

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hwpmc_x86.c

Use a better check for a valid kernel stack address when capturing

2009-12-03 14:59:42 +00:00

pmc_events.h

Reserve events for XScale.

2009-09-22 17:45:28 +00:00