0d2a298904
- This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
76 lines
3.1 KiB
C
76 lines
3.1 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)tss.h 5.4 (Berkeley) 1/18/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_TSS_H_
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#define _MACHINE_TSS_H_ 1
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/*
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* amd64 Context Data Type
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*
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* The alignment is pretty messed up here due to reuse of the original 32 bit
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* fields. It might be worth trying to set the tss on a +4 byte offset to
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* make the 64 bit fields aligned in practice.
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*/
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struct amd64tss {
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u_int32_t tss_rsvd0;
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u_int64_t tss_rsp0 __packed; /* kernel stack pointer ring 0 */
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u_int64_t tss_rsp1 __packed; /* kernel stack pointer ring 1 */
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u_int64_t tss_rsp2 __packed; /* kernel stack pointer ring 2 */
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u_int32_t tss_rsvd1;
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u_int32_t tss_rsvd2;
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u_int32_t tss_rsvd3;
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u_int64_t tss_ist1 __packed; /* Interrupt stack table 1 */
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u_int64_t tss_ist2 __packed; /* Interrupt stack table 2 */
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u_int64_t tss_ist3 __packed; /* Interrupt stack table 3 */
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u_int64_t tss_ist4 __packed; /* Interrupt stack table 4 */
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u_int64_t tss_ist5 __packed; /* Interrupt stack table 5 */
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u_int64_t tss_ist6 __packed; /* Interrupt stack table 6 */
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u_int64_t tss_ist7 __packed; /* Interrupt stack table 7 */
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u_int32_t tss_rsvd4;
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u_int32_t tss_rsvd5;
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u_int16_t tss_rsvd6;
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u_int16_t tss_iobase; /* io bitmap offset */
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};
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#ifdef _KERNEL
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extern struct amd64tss common_tss[];
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#endif
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#endif /* _MACHINE_TSS_H_ */
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