d90e30ba36
configure the mux and config registers for PIO devices based on what we find in the FDT. I developed it per the spec that had been committed to Linux in the January 2014 time frame and haven't updated. In short, bundles of pins are activated in specific ways for specific configurations, and we implement all of that. What's not included is a MI device infrastructure, any dynamic run-time changing of these pins, etc. Also not included are hooks into all the drivers to enable the latter (static at boot no driver changes are needed). These larger questions will need to be answered once we have more drivers like this for more platforms, or somebody has a heck of a lot of time to research a bunch of platforms, the Linux solution (which is good, but has its warts), etc.
51 lines
2.4 KiB
C
51 lines
2.4 KiB
C
/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* $FreeBSD$ */
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#ifndef ARM_AT91_AT91_PIOVAR_H
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#define ARM_AT91_AT91_PIOVAR_H
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void at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask,
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int use_pullup);
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void at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask,
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int use_pullup);
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void at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask);
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void at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask);
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void at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask,
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int use_pullup);
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void at91_pio_gpio_high_z(uint32_t pio, uint32_t high_z_mask, int enable);
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void at91_pio_gpio_set(uint32_t pio, uint32_t data_mask);
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void at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask);
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uint32_t at91_pio_gpio_get(uint32_t pio, uint32_t data_mask);
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void at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask,
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int use_deglitch);
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void at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
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int enable_interrupt);
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uint32_t at91_pio_gpio_clear_interrupt(uint32_t pio);
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void at91_pio_gpio_pullup(uint32_t pio, uint32_t data_mask, int do_pullup);
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#endif /* ARM_AT91_AT91_PIOVAR_H */
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