1d80cb1b37
for now. It introduces a OFW PCI bus driver and a generic OFW PCI-PCI bridge driver. By utilizing these, the PCI handling is much more elegant now. The advantages of the new approach are: - Device enumeration should hopefully be more like on Solaris now, so unit numbers should match what's printed on the box more closely. - Real interrupt routing is implemented now, so cardbus bridges etc. have at least a chance to work. - The quirk tables are gone and have been replaced by (hopefully sufficient) heuristics. - Much cleaner code. There was also a report that previously bogus interrupt assignments are fixed now, which can be attributed to the new heuristics. A pitfall, and the reason why this is not the default yet, is that it changes device enumeration, as mentioned above, which can make it necessary to change the system configuration if more than one unit of a device type is present (on a system with two hme cars, for example, it is possible that hme0 becomes hme1 and vice versa after enabling the option). Systems with multiple disk controllers may need to be booted into single user (and require manual specification of the root file system on boot) to adjust the fstab. Nevertheless, I would like to encourage users to use this option, so that it can be made the default soon. In detail, the changes are: - Introduce an OFW PCI bus driver; it inherits most methods from the generic PCI bus driver, but uses the firmware for enumeration, performs additional initialization for devices and firmware-specific interrupt routing. It also implements an OFW-specific method to allow child devices to get their firmware nodes. - Introduce an OFW PCI-PCI bridge driver; again, it inherits most of the generic PCI-PCI bridge driver; it has it's own method for interrupt routing, as well as some sparc64-specific methods (one to get the node again, and one to adjust the bridge bus range, since we need to reenumerate all PCI buses). - Convert the apb driver to the new way of handling things. - Provide a common framework for OFW bridge drivers, used be the two drivers above. - Provide a small common framework for interrupt routing (for all bridge types). - Convert the psycho driver to the new framework; this gets rid of a bunch of old kludges in pci_read_config(), and the whole preinitialization (ofw_pci_init()). - Convert the ISA MD part and the EBus driver to the new way interrupts and nodes are handled. - Introduce types for firmware interrupt properties. - Rename the old sparcbus_if to ofw_pci_if by repo copy (it is only required for PCI), and move it to a more correct location (new support methodsx were also added, and an old one was deprecated). - Fix a bunch of minor bugs, perform some cleanups. In some cases, I introduced some minor code duplication to keep the new code clean, in hopes that the old code will be unifdef'ed soon. Reviewed in part by: imp Tested by: jake, Marius Strobl <marius@alchemy.franken.de>, Sergey Mokryshev <mokr@mokr.net>, Chris Jackman <cjackNOSPAM@klatsch.org> Info on u30 firmware provided by: kris
135 lines
4.3 KiB
C
135 lines
4.3 KiB
C
/*-
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* Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ofw_pci.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <machine/bus.h>
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#include <machine/ofw_bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <sparc64/pci/ofw_pci.h>
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#include <sparc64/pci/ofw_pcib_subr.h>
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void
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ofw_pcib_gen_setup(device_t bridge)
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{
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struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
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u_int secbus;
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sc->ops_pcib_sc.dev = bridge;
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sc->ops_node = ofw_pci_get_node(bridge);
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KASSERT(sc->ops_node != 0,
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("ofw_pcib_gen_setup: no ofw pci parent bus!"));
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/*
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* Setup the secondary bus number register, by allocating a new unique
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* bus number for it; the firmware preset does not always seem to be
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* correct.
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*/
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secbus = ofw_pci_alloc_busno(sc->ops_node);
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pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1);
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pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1);
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pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1);
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sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus);
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ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
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sizeof(ofw_pci_intr_t));
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}
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int
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ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin)
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{
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struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
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struct ofw_bus_iinfo *ii = &sc->ops_iinfo;
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struct ofw_pci_register reg;
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device_t pbridge = device_get_parent(device_get_parent(bridge));
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phandle_t node = ofw_pci_get_node(dev);
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ofw_pci_intr_t pintr, mintr;
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u_int8_t maskbuf[sizeof(reg) + sizeof(pintr)];
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if (ii->opi_imapsz > 0) {
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pintr = intpin;
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if (ofw_bus_lookup_imap(node, ii, ®, sizeof(reg), &pintr,
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sizeof(pintr), &mintr, sizeof(mintr), maskbuf)) {
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/*
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* If we've found a mapping, return it and don't map
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* it again on higher levels - that causes problems
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* in some cases, and never seems to be required.
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*/
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return (mintr);
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}
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} else if (intpin >= 1 && intpin <= 4) {
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/*
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* When an interrupt map is missing, we need to do the
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* standard PCI swizzle and continue mapping at the parent.
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*/
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return (pcib_route_interrupt(bridge, dev, intpin));
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}
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/* Try at the parent. */
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return (PCIB_ROUTE_INTERRUPT(pbridge, bridge, intpin));
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}
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phandle_t
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ofw_pcib_gen_get_node(device_t bridge, device_t dev)
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{
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struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
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return (sc->ops_node);
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}
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void
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ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus)
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{
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struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
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if (subbus > sc->ops_pcib_sc.subbus) {
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#ifdef OFW_PCI_DEBUG
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device_printf(bridge,
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"adjusting secondary bus number from %d to %d\n",
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sc->ops_pcib_sc.subbus, subbus);
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#endif
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pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1);
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sc->ops_pcib_sc.subbus = subbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus);
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}
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}
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