26279767e4
o Eliminate IA64_PHYS_TO_RR6 and change all places where the macro is used
by calling either bus_space_map() or pmap_mapdev().
o Implement bus_space_map() in terms of pmap_mapdev() and implement
bus_space_unmap() in terms of pmap_unmapdev().
o Have ia64_pib hold the uncached virtual address of the processor interrupt
block throughout the kernel's life and access the elements of the PIB
through this structure pointer.
This is a non-functional change with the exception of using ia64_ld1() and
ia64_st8() to write to the PIB. We were still using assignments, for which
the compiler generates semaphore reads -- which cause undefined behaviour
for uncacheable memory. Note also that the memory barriers in ipi_send() are
critical for proper functioning.
With all the mapping of uncached memory done by pmap_mapdev(), we can keep
track of the translations and wire them in the CPU. This then eliminates
the need to reserve a whole region for uncached I/O and it eliminates
translation traps for device I/O accesses.
378 lines
6.6 KiB
C
378 lines
6.6 KiB
C
/*-
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* Copyright (c) 2009 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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extern u_long ia64_port_base;
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#define __PIO_ADDR(port) \
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(void *)(ia64_port_base | (((port) & 0xfffc) << 10) | ((port) & 0xFFF))
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int
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bus_space_map(bus_space_tag_t bst, bus_addr_t addr, bus_size_t size,
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int flags __unused, bus_space_handle_t *bshp)
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{
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*bshp = (__predict_false(bst == IA64_BUS_SPACE_IO))
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? addr : (uintptr_t)pmap_mapdev(addr, size);
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return (0);
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}
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void
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bus_space_unmap(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
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bus_size_t size)
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{
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pmap_unmapdev(bsh, size);
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}
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uint8_t
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bus_space_read_io_1(u_long port)
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{
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uint8_t v;
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ia64_mf();
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v = ia64_ld1(__PIO_ADDR(port));
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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uint16_t
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bus_space_read_io_2(u_long port)
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{
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uint16_t v;
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ia64_mf();
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v = ia64_ld2(__PIO_ADDR(port));
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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uint32_t
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bus_space_read_io_4(u_long port)
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{
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uint32_t v;
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ia64_mf();
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v = ia64_ld4(__PIO_ADDR(port));
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ia64_mf_a();
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ia64_mf();
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return (v);
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}
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#if 0
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uint64_t
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bus_space_read_io_8(u_long port)
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{
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}
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#endif
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void
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bus_space_write_io_1(u_long port, uint8_t val)
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{
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ia64_mf();
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ia64_st1(__PIO_ADDR(port), val);
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ia64_mf_a();
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ia64_mf();
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}
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void
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bus_space_write_io_2(u_long port, uint16_t val)
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{
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ia64_mf();
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ia64_st2(__PIO_ADDR(port), val);
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ia64_mf_a();
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ia64_mf();
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}
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void
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bus_space_write_io_4(u_long port, uint32_t val)
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{
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ia64_mf();
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ia64_st4(__PIO_ADDR(port), val);
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ia64_mf_a();
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ia64_mf();
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}
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#if 0
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void
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bus_space_write_io_8(u_long port, uint64_t val)
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{
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}
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#endif
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void
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bus_space_read_multi_io_1(u_long port, uint8_t *ptr, size_t count)
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{
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while (count-- > 0)
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*ptr++ = bus_space_read_io_1(port);
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}
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void
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bus_space_read_multi_io_2(u_long port, uint16_t *ptr, size_t count)
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{
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while (count-- > 0)
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*ptr++ = bus_space_read_io_2(port);
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}
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void
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bus_space_read_multi_io_4(u_long port, uint32_t *ptr, size_t count)
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{
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while (count-- > 0)
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*ptr++ = bus_space_read_io_4(port);
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}
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#if 0
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void
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bus_space_read_multi_io_8(u_long port, uint64_t *ptr, size_t count)
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{
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}
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#endif
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void
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bus_space_write_multi_io_1(u_long port, const uint8_t *ptr, size_t count)
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{
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while (count-- > 0)
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bus_space_write_io_1(port, *ptr++);
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}
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void
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bus_space_write_multi_io_2(u_long port, const uint16_t *ptr, size_t count)
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{
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while (count-- > 0)
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bus_space_write_io_2(port, *ptr++);
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}
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void
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bus_space_write_multi_io_4(u_long port, const uint32_t *ptr, size_t count)
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{
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while (count-- > 0)
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bus_space_write_io_4(port, *ptr++);
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}
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#if 0
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void
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bus_space_write_multi_io_8(u_long port, const uint64_t *ptr, size_t count)
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{
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}
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#endif
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void
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bus_space_read_region_io_1(u_long port, uint8_t *ptr, size_t count)
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{
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while (count-- > 0) {
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*ptr++ = bus_space_read_io_1(port);
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port += 1;
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}
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}
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void
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bus_space_read_region_io_2(u_long port, uint16_t *ptr, size_t count)
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{
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while (count-- > 0) {
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*ptr++ = bus_space_read_io_2(port);
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port += 2;
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}
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}
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void
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bus_space_read_region_io_4(u_long port, uint32_t *ptr, size_t count)
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{
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while (count-- > 0) {
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*ptr++ = bus_space_read_io_4(port);
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port += 4;
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}
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}
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#if 0
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void bus_space_read_region_io_8(u_long, uint64_t *, size_t);
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#endif
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void
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bus_space_write_region_io_1(u_long port, const uint8_t *ptr, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_1(port, *ptr++);
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port += 1;
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}
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}
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void
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bus_space_write_region_io_2(u_long port, const uint16_t *ptr, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_2(port, *ptr++);
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port += 2;
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}
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}
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void
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bus_space_write_region_io_4(u_long port, const uint32_t *ptr, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_4(port, *ptr++);
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port += 4;
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}
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}
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#if 0
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void
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bus_space_write_region_io_8(u_long port, const uint64_t *ptr, size_t count)
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{
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}
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#endif
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void
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bus_space_set_region_io_1(u_long port, uint8_t val, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_1(port, val);
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port += 1;
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}
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}
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void
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bus_space_set_region_io_2(u_long port, uint16_t val, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_2(port, val);
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port += 2;
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}
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}
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void
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bus_space_set_region_io_4(u_long port, uint32_t val, size_t count)
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{
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while (count-- > 0) {
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bus_space_write_io_4(port, val);
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port += 4;
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}
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}
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#if 0
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void
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bus_space_set_region_io_8(u_long port, uint64_t val, size_t count)
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{
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}
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#endif
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void
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bus_space_copy_region_io_1(u_long src, u_long dst, size_t count)
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{
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long delta;
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uint8_t val;
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if (src < dst) {
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src += count - 1;
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dst += count - 1;
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delta = -1;
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} else
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delta = 1;
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while (count-- > 0) {
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val = bus_space_read_io_1(src);
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bus_space_write_io_1(dst, val);
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src += delta;
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dst += delta;
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}
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}
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void
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bus_space_copy_region_io_2(u_long src, u_long dst, size_t count)
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{
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long delta;
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uint16_t val;
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if (src < dst) {
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src += 2 * (count - 1);
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dst += 2 * (count - 1);
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delta = -2;
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} else
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delta = 2;
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while (count-- > 0) {
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val = bus_space_read_io_2(src);
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bus_space_write_io_2(dst, val);
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src += delta;
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dst += delta;
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}
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}
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void
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bus_space_copy_region_io_4(u_long src, u_long dst, size_t count)
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{
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long delta;
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uint32_t val;
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if (src < dst) {
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src += 4 * (count - 1);
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dst += 4 * (count - 1);
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delta = -4;
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} else
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delta = 4;
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while (count-- > 0) {
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val = bus_space_read_io_4(src);
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bus_space_write_io_4(dst, val);
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src += delta;
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dst += delta;
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}
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}
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#if 0
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void
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bus_space_copy_region_io_8(u_long src, u_long dst, size_t count)
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{
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}
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#endif
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