422d05da14
An i2c bus can be divided into segments which can be selectively connected and disconnected from the main bus. This is usually done to enable using multiple slave devices having the same address, by isolating the devices onto separate bus segments, only one of which is connected to the main bus at once. There are several types of i2c bus muxes, which break down into two general categories... - Muxes which are themselves i2c slaves. These devices respond to i2c commands on their upstream bus, and based on those commands, connect various downstream buses to the upstream. In newbus terms, they are both a child of an iicbus and the parent of one or more iicbus instances. - Muxes which are not i2c devices themselves. Such devices are part of the i2c bus electrically, but in newbus terms their parent is some other bus. The association with the upstream bus must be established by separate metadata (such as FDT data). In both cases, the mux driver has one or more iicbus child instances representing the downstream buses. The mux driver implements the iicbus_if interface, as if it were an iichb host bridge/i2c controller driver. It services the IO requests sent to it by forwarding them to the iicbus instance representing the upstream bus, after electrically connecting the upstream bus to the downstream bus that hosts the i2c slave device which made the IO request. The net effect is automatic mux switching which is transparent to slaves on the downstream buses. They just do i2c IO they way they normally do, and the bus is electrically connected for the duration of the IO and then idled when it is complete. The existing iicbus_if callback() method is enhanced so that the parameter passed to it can be a struct which contains a device_t for the requesting bus and slave devices. This change is done by adding a flag that indicates the extra values are present, and making the flags field the first field of a new args struct. If the flag is set, the iichb or mux driver can recast the pointer-to-flags into a pointer-to-struct and access the extra fields. Thus abi compatibility with older drivers is retained (but a mux cannot exist on the bus with the older iicbus driver in use.) A new set of core support routines exists in iicbus.c. This code will help implement mux drivers for any type of mux hardware by supplying all the boilerplate code that forwards IO requests upstream. It also has code for parsing metadata and instantiating the child iicbus instances based on it. Two new hardware mux drivers are added. The ltc430x driver supports the LTC4305/4306 mux chips which are controlled via i2c commands. The iic_gpiomux driver supports any mux hardware which is controlled by manipulating the state of one or more gpio pins. Test Plan Tested locally using a variety of mux'd bus configurations involving both ltc4305 and a homebrew gpio-controlled mux. Tested configurations included cascaded muxes (unlikely in the real world, but useful to prove that 'it all just works' in terms of the automatic switching and upstream forwarding of IO requests).
596 lines
15 KiB
C
596 lines
15 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 1998 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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/*
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* Encode a system errno value into the IIC_Exxxxx space by setting the
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* IIC_ERRNO marker bit, so that iic2errno() can turn it back into a plain
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* system errno value later. This lets controller- and bus-layer code get
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* important system errno values (such as EINTR/ERESTART) back to the caller.
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*/
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int
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errno2iic(int errno)
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{
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return ((errno == 0) ? 0 : errno | IIC_ERRNO);
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}
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/*
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* Translate IIC_Exxxxx status values to vaguely-equivelent errno values.
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*/
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int
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iic2errno(int iic_status)
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{
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switch (iic_status) {
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case IIC_NOERR: return (0);
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case IIC_EBUSERR: return (EALREADY);
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case IIC_ENOACK: return (EIO);
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case IIC_ETIMEOUT: return (ETIMEDOUT);
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case IIC_EBUSBSY: return (EWOULDBLOCK);
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case IIC_ESTATUS: return (EPROTO);
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case IIC_EUNDERFLOW: return (EIO);
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case IIC_EOVERFLOW: return (EOVERFLOW);
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case IIC_ENOTSUPP: return (EOPNOTSUPP);
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case IIC_ENOADDR: return (EADDRNOTAVAIL);
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case IIC_ERESOURCE: return (ENOMEM);
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default:
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/*
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* If the high bit is set, that means it's a system errno value
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* that was encoded into the IIC_Exxxxxx space by setting the
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* IIC_ERRNO marker bit. If lots of high-order bits are set,
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* then it's one of the negative pseudo-errors such as ERESTART
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* and we return it as-is. Otherwise it's a plain "small
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* positive integer" errno, so just remove the IIC_ERRNO marker
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* bit. If it's some unknown number without the high bit set,
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* there isn't much we can do except call it an I/O error.
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*/
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if ((iic_status & IIC_ERRNO) == 0)
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return (EIO);
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if ((iic_status & 0xFFFF0000) != 0)
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return (iic_status);
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return (iic_status & ~IIC_ERRNO);
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}
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}
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/*
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* iicbus_intr()
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*/
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void
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iicbus_intr(device_t bus, int event, char *buf)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* call owner's intr routine */
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if (sc->owner)
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IICBUS_INTR(sc->owner, event, buf);
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return;
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}
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static int
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iicbus_poll(struct iicbus_softc *sc, int how)
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{
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int error;
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IICBUS_ASSERT_LOCKED(sc);
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switch (how & IIC_INTRWAIT) {
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case IIC_WAIT | IIC_INTR:
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error = mtx_sleep(sc, &sc->lock, IICPRI|PCATCH, "iicreq", 0);
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break;
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case IIC_WAIT | IIC_NOINTR:
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error = mtx_sleep(sc, &sc->lock, IICPRI, "iicreq", 0);
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break;
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default:
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return (IIC_EBUSBSY);
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}
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return (errno2iic(error));
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}
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/*
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* iicbus_request_bus()
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*
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* Allocate the device to perform transfers.
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*
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* how : IIC_WAIT or IIC_DONTWAIT
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*/
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int
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iicbus_request_bus(device_t bus, device_t dev, int how)
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{
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struct iic_reqbus_data reqdata;
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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IICBUS_LOCK(sc);
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for (;;) {
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if (sc->owner == NULL)
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break;
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if ((how & IIC_RECURSIVE) && sc->owner == dev)
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break;
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if ((error = iicbus_poll(sc, how)) != 0)
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break;
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}
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if (error == 0) {
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++sc->owncount;
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if (sc->owner == NULL) {
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sc->owner = dev;
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/*
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* Mark the device busy while it owns the bus, to
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* prevent detaching the device, bus, or hardware
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* controller, until ownership is relinquished. If the
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* device is doing IO from its probe method before
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* attaching, it cannot be busied; mark the bus busy.
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*/
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if (device_get_state(dev) < DS_ATTACHING)
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sc->busydev = bus;
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else
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sc->busydev = dev;
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device_busy(sc->busydev);
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/*
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* Drop the lock around the call to the bus driver, it
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* should be allowed to sleep in the IIC_WAIT case.
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* Drivers might also need to grab locks that would
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* cause a LOR if our lock is held.
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*/
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IICBUS_UNLOCK(sc);
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/* Ask the underlying layers if the request is ok */
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reqdata.dev = dev;
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reqdata.bus = bus;
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reqdata.flags = how | IIC_REQBUS_DEV;
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error = IICBUS_CALLBACK(device_get_parent(bus),
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IIC_REQUEST_BUS, (caddr_t)&reqdata);
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IICBUS_LOCK(sc);
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if (error != 0) {
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sc->owner = NULL;
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sc->owncount = 0;
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wakeup_one(sc);
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device_unbusy(sc->busydev);
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}
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}
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}
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IICBUS_UNLOCK(sc);
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return (error);
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}
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/*
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* iicbus_release_bus()
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*
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* Release the device allocated with iicbus_request_dev()
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*/
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int
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iicbus_release_bus(device_t bus, device_t dev)
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{
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struct iic_reqbus_data reqdata;
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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IICBUS_LOCK(sc);
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if (sc->owner != dev) {
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IICBUS_UNLOCK(sc);
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return (IIC_EBUSBSY);
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}
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if (--sc->owncount == 0) {
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/* Drop the lock while informing the low-level driver. */
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IICBUS_UNLOCK(sc);
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reqdata.dev = dev;
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reqdata.bus = bus;
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reqdata.flags = IIC_REQBUS_DEV;
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IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS,
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(caddr_t)&reqdata);
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IICBUS_LOCK(sc);
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sc->owner = NULL;
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wakeup_one(sc);
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device_unbusy(sc->busydev);
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}
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IICBUS_UNLOCK(sc);
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return (0);
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}
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/*
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* iicbus_started()
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*
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* Test if the iicbus is started by the controller
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*/
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int
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iicbus_started(device_t bus)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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return (sc->started);
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}
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/*
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* iicbus_start()
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*
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* Send start condition to the slave addressed by 'slave'
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*/
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int
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iicbus_start(device_t bus, u_char slave, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (sc->started)
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return (IIC_ESTATUS); /* protocol error, bus already started */
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if (!(error = IICBUS_START(device_get_parent(bus), slave, timeout)))
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sc->started = slave;
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else
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_repeated_start()
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*
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* Send start condition to the slave addressed by 'slave'
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*/
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int
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iicbus_repeated_start(device_t bus, u_char slave, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (!sc->started)
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return (IIC_ESTATUS); /* protocol error, bus not started */
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if (!(error = IICBUS_REPEATED_START(device_get_parent(bus), slave, timeout)))
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sc->started = slave;
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else
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_stop()
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*
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* Send stop condition to the bus
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*/
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int
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iicbus_stop(device_t bus)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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int error = 0;
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if (!sc->started)
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return (IIC_ESTATUS); /* protocol error, bus not started */
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error = IICBUS_STOP(device_get_parent(bus));
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/* refuse any further access */
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sc->started = 0;
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return (error);
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}
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/*
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* iicbus_write()
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*
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* Write a block of data to the slave previously started by
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* iicbus_start() call
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*/
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int
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iicbus_write(device_t bus, const char *buf, int len, int *sent, int timeout)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* a slave must have been started for writing */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) != 0))
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return (IIC_ESTATUS);
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return (IICBUS_WRITE(device_get_parent(bus), buf, len, sent, timeout));
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}
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/*
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* iicbus_read()
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*
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* Read a block of data from the slave previously started by
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* iicbus_read() call
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*/
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int
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iicbus_read(device_t bus, char *buf, int len, int *read, int last, int delay)
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{
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struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
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/* a slave must have been started for reading */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) == 0))
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return (IIC_ESTATUS);
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return (IICBUS_READ(device_get_parent(bus), buf, len, read, last, delay));
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}
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/*
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* iicbus_write_byte()
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*
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* Write a byte to the slave previously started by iicbus_start() call
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*/
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int
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iicbus_write_byte(device_t bus, char byte, int timeout)
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{
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struct iicbus_softc *sc = device_get_softc(bus);
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char data = byte;
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int sent;
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/* a slave must have been started for writing */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) != 0))
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return (IIC_ESTATUS);
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return (iicbus_write(bus, &data, 1, &sent, timeout));
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}
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/*
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* iicbus_read_byte()
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*
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* Read a byte from the slave previously started by iicbus_start() call
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*/
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int
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iicbus_read_byte(device_t bus, char *byte, int timeout)
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{
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struct iicbus_softc *sc = device_get_softc(bus);
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int read;
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/* a slave must have been started for reading */
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if (sc->started == 0 || (sc->strict != 0 && (sc->started & LSB) == 0))
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return (IIC_ESTATUS);
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return (iicbus_read(bus, byte, 1, &read, IIC_LAST_READ, timeout));
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}
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/*
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* iicbus_block_write()
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*
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* Write a block of data to slave ; start/stop protocol managed
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*/
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int
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iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent)
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{
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u_char addr = slave & ~LSB;
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int error;
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if ((error = iicbus_start(bus, addr, 0)))
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return (error);
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error = iicbus_write(bus, buf, len, sent, 0);
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iicbus_stop(bus);
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return (error);
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}
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/*
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* iicbus_block_read()
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*
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* Read a block of data from slave ; start/stop protocol managed
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*/
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int
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iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read)
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{
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u_char addr = slave | LSB;
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int error;
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if ((error = iicbus_start(bus, addr, 0)))
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return (error);
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error = iicbus_read(bus, buf, len, read, IIC_LAST_READ, 0);
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iicbus_stop(bus);
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return (error);
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}
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/*
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* iicbus_transfer()
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*
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* Do an aribtrary number of transfers on the iicbus. We pass these
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* raw requests to the bridge driver. If the bridge driver supports
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* them directly, then it manages all the details. If not, it can use
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* the helper function iicbus_transfer_gen() which will do the
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* transfers at a low level.
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*
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* Pointers passed in as part of iic_msg must be kernel pointers.
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* Callers that have user addresses to manage must do so on their own.
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*/
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int
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iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs)
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{
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return (IICBUS_TRANSFER(device_get_parent(bus), msgs, nmsgs));
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}
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int
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iicbus_transfer_excl(device_t dev, struct iic_msg *msgs, uint32_t nmsgs,
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int how)
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{
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device_t bus;
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int error;
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bus = device_get_parent(dev);
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error = iicbus_request_bus(bus, dev, how);
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if (error == 0)
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error = IICBUS_TRANSFER(bus, msgs, nmsgs);
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iicbus_release_bus(bus, dev);
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return (error);
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}
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/*
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* Generic version of iicbus_transfer that calls the appropriate
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* routines to accomplish this. See note above about acceptable
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* buffer addresses.
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*/
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int
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iicbus_transfer_gen(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
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{
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int i, error, lenread, lenwrote, nkid, rpstart, addr;
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device_t *children, bus;
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bool started;
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if ((error = device_get_children(dev, &children, &nkid)) != 0)
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return (IIC_ERESOURCE);
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if (nkid != 1) {
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free(children, M_TEMP);
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return (IIC_ENOTSUPP);
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}
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bus = children[0];
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rpstart = 0;
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free(children, M_TEMP);
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started = false;
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for (i = 0, error = 0; i < nmsgs && error == 0; i++) {
|
|
addr = msgs[i].slave;
|
|
if (msgs[i].flags & IIC_M_RD)
|
|
addr |= LSB;
|
|
else
|
|
addr &= ~LSB;
|
|
|
|
if (!(msgs[i].flags & IIC_M_NOSTART)) {
|
|
if (rpstart)
|
|
error = iicbus_repeated_start(bus, addr, 0);
|
|
else
|
|
error = iicbus_start(bus, addr, 0);
|
|
if (error != 0)
|
|
break;
|
|
started = true;
|
|
}
|
|
|
|
if (msgs[i].flags & IIC_M_RD)
|
|
error = iicbus_read(bus, msgs[i].buf, msgs[i].len,
|
|
&lenread, IIC_LAST_READ, 0);
|
|
else
|
|
error = iicbus_write(bus, msgs[i].buf, msgs[i].len,
|
|
&lenwrote, 0);
|
|
if (error != 0)
|
|
break;
|
|
|
|
if (!(msgs[i].flags & IIC_M_NOSTOP)) {
|
|
rpstart = 0;
|
|
iicbus_stop(bus);
|
|
} else {
|
|
rpstart = 1; /* Next message gets repeated start */
|
|
}
|
|
}
|
|
if (error != 0 && started)
|
|
iicbus_stop(bus);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
iicdev_readfrom(device_t slavedev, uint8_t regaddr, void *buffer,
|
|
uint16_t buflen, int waithow)
|
|
{
|
|
struct iic_msg msgs[2];
|
|
uint8_t slaveaddr;
|
|
|
|
/*
|
|
* Two transfers back to back with a repeat-start between them; first we
|
|
* write the address-within-device, then we read from the device.
|
|
*/
|
|
slaveaddr = iicbus_get_addr(slavedev);
|
|
|
|
msgs[0].slave = slaveaddr;
|
|
msgs[0].flags = IIC_M_WR | IIC_M_NOSTOP;
|
|
msgs[0].len = 1;
|
|
msgs[0].buf = ®addr;
|
|
|
|
msgs[1].slave = slaveaddr;
|
|
msgs[1].flags = IIC_M_RD;
|
|
msgs[1].len = buflen;
|
|
msgs[1].buf = buffer;
|
|
|
|
return (iicbus_transfer_excl(slavedev, msgs, nitems(msgs), waithow));
|
|
}
|
|
|
|
int iicdev_writeto(device_t slavedev, uint8_t regaddr, void *buffer,
|
|
uint16_t buflen, int waithow)
|
|
{
|
|
struct iic_msg msg;
|
|
uint8_t local_buffer[32];
|
|
uint8_t *bufptr;
|
|
size_t bufsize;
|
|
int error;
|
|
|
|
/*
|
|
* Ideally, we would do two transfers back to back with no stop or start
|
|
* between them using an array of 2 iic_msgs; first we'd write the
|
|
* address byte using the IIC_M_NOSTOP flag, then we write the data
|
|
* using IIC_M_NOSTART, all in a single transfer. Unfortunately,
|
|
* several i2c hardware drivers don't support that (perhaps because the
|
|
* hardware itself can't support it). So instead we gather the
|
|
* scattered bytes into a single buffer here before writing them using a
|
|
* single iic_msg. This function is typically used to write a few bytes
|
|
* at a time, so we try to use a small local buffer on the stack, but
|
|
* fall back to allocating a temporary buffer when necessary.
|
|
*/
|
|
|
|
bufsize = buflen + 1;
|
|
if (bufsize <= sizeof(local_buffer)) {
|
|
bufptr = local_buffer;
|
|
} else {
|
|
bufptr = malloc(bufsize, M_DEVBUF,
|
|
(waithow & IIC_WAIT) ? M_WAITOK : M_NOWAIT);
|
|
if (bufptr == NULL)
|
|
return (errno2iic(ENOMEM));
|
|
}
|
|
|
|
bufptr[0] = regaddr;
|
|
memcpy(&bufptr[1], buffer, buflen);
|
|
|
|
msg.slave = iicbus_get_addr(slavedev);
|
|
msg.flags = IIC_M_WR;
|
|
msg.len = bufsize;
|
|
msg.buf = bufptr;
|
|
|
|
error = iicbus_transfer_excl(slavedev, &msg, 1, waithow);
|
|
|
|
if (bufptr != local_buffer)
|
|
free(bufptr, M_DEVBUF);
|
|
|
|
return (error);
|
|
}
|