43b595f6a5
Requested by: mjg Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D9447
563 lines
12 KiB
C
563 lines
12 KiB
C
/*-
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#define fence() __asm __volatile("fence" ::: "memory");
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#define mb() fence()
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#define rmb() fence()
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#define wmb() fence()
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#define ATOMIC_ACQ_REL(NAME, WIDTH) \
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static __inline void \
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atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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fence(); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
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{ \
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fence(); \
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atomic_##NAME##_##WIDTH(p, v); \
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}
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static __inline void
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atomic_add_32(volatile uint32_t *p, uint32_t val)
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{
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__asm __volatile("amoadd.w zero, %1, %0"
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: "+A" (*p)
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: "r" (val)
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: "memory");
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}
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static __inline void
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atomic_subtract_32(volatile uint32_t *p, uint32_t val)
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{
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__asm __volatile("amoadd.w zero, %1, %0"
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: "+A" (*p)
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: "r" (-val)
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: "memory");
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}
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static __inline void
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atomic_set_32(volatile uint32_t *p, uint32_t val)
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{
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__asm __volatile("amoor.w zero, %1, %0"
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: "+A" (*p)
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: "r" (val)
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: "memory");
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}
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static __inline void
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atomic_clear_32(volatile uint32_t *p, uint32_t val)
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{
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__asm __volatile("amoand.w zero, %1, %0"
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: "+A" (*p)
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: "r" (~val)
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: "memory");
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}
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static __inline int
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atomic_cmpset_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
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{
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uint32_t tmp;
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int res;
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res = 0;
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__asm __volatile(
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"0:"
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"li %1, 1\n" /* Preset to fail */
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"lr.w %0, %2\n"
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"bne %0, %z3, 1f\n"
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"sc.w %1, %z4, %2\n"
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"bnez %1, 0b\n"
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"1:"
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: "=&r" (tmp), "=&r" (res), "+A" (*p)
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: "rJ" (cmpval), "rJ" (newval)
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: "memory");
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return (!res);
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}
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static __inline int
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atomic_fcmpset_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
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{
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uint32_t tmp;
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int res;
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res = 0;
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__asm __volatile(
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"0:"
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"li %1, 1\n" /* Preset to fail */
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"lr.w %0, %2\n" /* Load old value */
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"bne %0, %z4, 1f\n" /* Compare */
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"sc.w %1, %z5, %2\n" /* Try to store new value */
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"j 2f\n"
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"1:"
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"sw %0, %3\n" /* Save old value */
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"2:"
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: "=&r" (tmp), "=&r" (res), "+A" (*p), "+A" (*cmpval)
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: "rJ" (*cmpval), "rJ" (newval)
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: "memory");
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return (!res);
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}
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static __inline uint32_t
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atomic_fetchadd_32(volatile uint32_t *p, uint32_t val)
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{
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uint32_t ret;
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__asm __volatile("amoadd.w %0, %2, %1"
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: "=&r" (ret), "+A" (*p)
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: "r" (val)
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: "memory");
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return (ret);
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}
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static __inline uint32_t
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atomic_readandclear_32(volatile uint32_t *p)
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{
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uint32_t ret;
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uint32_t val;
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val = 0;
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__asm __volatile("amoswap.w %0, %2, %1"
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: "=&r"(ret), "+A" (*p)
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: "r" (val)
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: "memory");
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return (ret);
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}
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#define atomic_add_int atomic_add_32
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#define atomic_clear_int atomic_clear_32
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#define atomic_cmpset_int atomic_cmpset_32
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#define atomic_fcmpset_int atomic_fcmpset_32
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#define atomic_fetchadd_int atomic_fetchadd_32
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_set_int atomic_set_32
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#define atomic_subtract_int atomic_subtract_32
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ATOMIC_ACQ_REL(set, 32)
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ATOMIC_ACQ_REL(clear, 32)
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ATOMIC_ACQ_REL(add, 32)
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ATOMIC_ACQ_REL(subtract, 32)
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static __inline int
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atomic_cmpset_acq_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
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{
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int res;
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res = atomic_cmpset_32(p, cmpval, newval);
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fence();
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return (res);
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}
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static __inline int
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atomic_cmpset_rel_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
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{
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fence();
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return (atomic_cmpset_32(p, cmpval, newval));
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}
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static __inline int
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atomic_fcmpset_acq_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
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{
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int res;
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res = atomic_fcmpset_32(p, cmpval, newval);
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fence();
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return (res);
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}
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static __inline int
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atomic_fcmpset_rel_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
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{
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fence();
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return (atomic_fcmpset_32(p, cmpval, newval));
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}
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static __inline uint32_t
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atomic_load_acq_32(volatile uint32_t *p)
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{
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uint32_t ret;
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ret = *p;
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fence();
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return (ret);
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}
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static __inline void
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atomic_store_rel_32(volatile uint32_t *p, uint32_t val)
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{
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fence();
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*p = val;
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}
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#define atomic_add_acq_int atomic_add_acq_32
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#define atomic_clear_acq_int atomic_clear_acq_32
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#define atomic_cmpset_acq_int atomic_cmpset_acq_32
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#define atomic_fcmpset_acq_int atomic_fcmpset_acq_32
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#define atomic_load_acq_int atomic_load_acq_32
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#define atomic_set_acq_int atomic_set_acq_32
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#define atomic_subtract_acq_int atomic_subtract_acq_32
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#define atomic_add_rel_int atomic_add_rel_32
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#define atomic_clear_rel_int atomic_add_rel_32
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#define atomic_cmpset_rel_int atomic_cmpset_rel_32
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#define atomic_fcmpset_rel_int atomic_fcmpset_rel_32
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#define atomic_set_rel_int atomic_set_rel_32
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#define atomic_subtract_rel_int atomic_subtract_rel_32
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#define atomic_store_rel_int atomic_store_rel_32
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static __inline void
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atomic_add_64(volatile uint64_t *p, uint64_t val)
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{
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__asm __volatile("amoadd.d zero, %1, %0"
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: "+A" (*p)
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: "r" (val)
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: "memory");
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}
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static __inline void
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atomic_subtract_64(volatile uint64_t *p, uint64_t val)
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{
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__asm __volatile("amoadd.d zero, %1, %0"
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: "+A" (*p)
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: "r" (-val)
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: "memory");
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}
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static __inline void
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atomic_set_64(volatile uint64_t *p, uint64_t val)
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{
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__asm __volatile("amoor.d zero, %1, %0"
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: "+A" (*p)
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: "r" (val)
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: "memory");
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}
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static __inline void
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atomic_clear_64(volatile uint64_t *p, uint64_t val)
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{
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__asm __volatile("amoand.d zero, %1, %0"
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: "+A" (*p)
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: "r" (~val)
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: "memory");
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}
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static __inline int
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atomic_cmpset_64(volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
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{
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uint64_t tmp;
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int res;
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res = 0;
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__asm __volatile(
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"0:"
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"li %1, 1\n" /* Preset to fail */
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"lr.d %0, %2\n"
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"bne %0, %z3, 1f\n"
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"sc.d %1, %z4, %2\n"
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"bnez %1, 0b\n"
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"1:"
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: "=&r" (tmp), "=&r" (res), "+A" (*p)
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: "rJ" (cmpval), "rJ" (newval)
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: "memory");
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return (!res);
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}
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static __inline int
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atomic_fcmpset_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
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{
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uint64_t tmp;
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int res;
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res = 0;
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__asm __volatile(
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"0:"
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"li %1, 1\n" /* Preset to fail */
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"lr.d %0, %2\n" /* Load old value */
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"bne %0, %z4, 1f\n" /* Compare */
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"sc.d %1, %z5, %2\n" /* Try to store new value */
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"j 2f\n"
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"1:"
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"sd %0, %3\n" /* Save old value */
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"2:"
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: "=&r" (tmp), "=&r" (res), "+A" (*p), "+A" (*cmpval)
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: "rJ" (*cmpval), "rJ" (newval)
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: "memory");
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return (!res);
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}
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static __inline uint64_t
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atomic_fetchadd_64(volatile uint64_t *p, uint64_t val)
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{
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uint64_t ret;
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__asm __volatile("amoadd.d %0, %2, %1"
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: "=&r" (ret), "+A" (*p)
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: "r" (val)
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: "memory");
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return (ret);
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}
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static __inline uint64_t
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atomic_readandclear_64(volatile uint64_t *p)
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{
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uint64_t ret;
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uint64_t val;
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val = 0;
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__asm __volatile("amoswap.d %0, %2, %1"
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: "=&r"(ret), "+A" (*p)
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: "r" (val)
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: "memory");
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return (ret);
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}
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static __inline uint32_t
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atomic_swap_32(volatile uint32_t *p, uint32_t val)
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{
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uint32_t old;
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__asm __volatile("amoswap.w %0, %2, %1"
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: "=&r"(old), "+A" (*p)
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: "r" (val)
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: "memory");
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return (old);
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}
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static __inline uint64_t
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atomic_swap_64(volatile uint64_t *p, uint64_t val)
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{
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uint64_t old;
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__asm __volatile("amoswap.d %0, %2, %1"
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: "=&r"(old), "+A" (*p)
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: "r" (val)
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: "memory");
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return (old);
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}
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#define atomic_add_long atomic_add_64
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#define atomic_clear_long atomic_clear_64
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#define atomic_cmpset_long atomic_cmpset_64
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#define atomic_fcmpset_long atomic_fcmpset_64
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#define atomic_fetchadd_long atomic_fetchadd_64
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#define atomic_readandclear_long atomic_readandclear_64
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#define atomic_set_long atomic_set_64
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#define atomic_subtract_long atomic_subtract_64
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#define atomic_add_ptr atomic_add_64
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#define atomic_clear_ptr atomic_clear_64
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#define atomic_cmpset_ptr atomic_cmpset_64
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#define atomic_fcmpset_ptr atomic_fcmpset_64
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#define atomic_fetchadd_ptr atomic_fetchadd_64
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#define atomic_readandclear_ptr atomic_readandclear_64
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#define atomic_set_ptr atomic_set_64
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#define atomic_subtract_ptr atomic_subtract_64
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ATOMIC_ACQ_REL(set, 64)
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ATOMIC_ACQ_REL(clear, 64)
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ATOMIC_ACQ_REL(add, 64)
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ATOMIC_ACQ_REL(subtract, 64)
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static __inline int
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atomic_cmpset_acq_64(volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
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{
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int res;
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res = atomic_cmpset_64(p, cmpval, newval);
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fence();
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return (res);
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}
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static __inline int
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atomic_cmpset_rel_64(volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
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{
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fence();
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return (atomic_cmpset_64(p, cmpval, newval));
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}
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static __inline int
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atomic_fcmpset_acq_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
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{
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int res;
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res = atomic_fcmpset_64(p, cmpval, newval);
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fence();
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return (res);
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}
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static __inline int
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atomic_fcmpset_rel_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
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{
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fence();
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return (atomic_fcmpset_64(p, cmpval, newval));
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}
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static __inline uint64_t
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atomic_load_acq_64(volatile uint64_t *p)
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{
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uint64_t ret;
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ret = *p;
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fence();
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return (ret);
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}
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static __inline void
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atomic_store_rel_64(volatile uint64_t *p, uint64_t val)
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{
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fence();
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*p = val;
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}
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#define atomic_add_acq_long atomic_add_acq_64
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#define atomic_clear_acq_long atomic_add_acq_64
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#define atomic_cmpset_acq_long atomic_cmpset_acq_64
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#define atomic_fcmpset_acq_long atomic_fcmpset_acq_64
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#define atomic_load_acq_long atomic_load_acq_64
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#define atomic_set_acq_long atomic_set_acq_64
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#define atomic_subtract_acq_long atomic_subtract_acq_64
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#define atomic_add_acq_ptr atomic_add_acq_64
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#define atomic_clear_acq_ptr atomic_add_acq_64
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#define atomic_cmpset_acq_ptr atomic_cmpset_acq_64
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#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_64
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#define atomic_load_acq_ptr atomic_load_acq_64
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#define atomic_set_acq_ptr atomic_set_acq_64
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#define atomic_subtract_acq_ptr atomic_subtract_acq_64
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static __inline void
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atomic_thread_fence_acq(void)
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{
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fence();
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}
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static __inline void
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atomic_thread_fence_rel(void)
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{
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fence();
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}
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static __inline void
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atomic_thread_fence_acq_rel(void)
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{
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fence();
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}
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static __inline void
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atomic_thread_fence_seq_cst(void)
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{
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fence();
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}
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#define atomic_add_rel_long atomic_add_rel_64
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#define atomic_clear_rel_long atomic_clear_rel_64
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#define atomic_add_rel_long atomic_add_rel_64
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#define atomic_clear_rel_long atomic_clear_rel_64
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#define atomic_cmpset_rel_long atomic_cmpset_rel_64
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#define atomic_fcmpset_rel_long atomic_fcmpset_rel_64
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#define atomic_set_rel_long atomic_set_rel_64
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#define atomic_subtract_rel_long atomic_subtract_rel_64
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#define atomic_store_rel_long atomic_store_rel_64
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#define atomic_add_rel_ptr atomic_add_rel_64
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#define atomic_clear_rel_ptr atomic_clear_rel_64
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#define atomic_cmpset_rel_ptr atomic_cmpset_rel_64
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#define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_64
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#define atomic_set_rel_ptr atomic_set_rel_64
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#define atomic_subtract_rel_ptr atomic_subtract_rel_64
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#define atomic_store_rel_ptr atomic_store_rel_64
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#endif /* _MACHINE_ATOMIC_H_ */
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