333b8de537
- Move PUSH_FRAME and POP_FRAME to asmacros.h and use PUSH_FRAME in atpic entry points. - Move PCPU_* asm macros out of the middle of the asm profiling macros. - Pass IRQ vector argument as an int rather than void * to reduce diffs with i386. - EOI the lapic in C for the lapic timer handler. - GC unused Xcpuast function. - Split IPI_STOP handling code of ipi_nmi_handler() out into a cpustop_handler() function and call it from Xcpustop rather than duplicating all the logic in assembly. - Fixup the list of symbols with interrupt frames in ddb traces. Xatpic_fastintr* have never existed on amd64, and the lapic timer handler and various IPI handlers were missing. - Use trapframe instead of intrframe for interrupt entry points (on amd64 the interrupt vector was already a separate argument, so the two frames were already identical) and GC intrframe. Submitted by: peter (3)
73 lines
2.5 KiB
ArmAsm
73 lines
2.5 KiB
ArmAsm
/*-
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* Copyright (c) 1989, 1990 William F. Jolitz.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $FreeBSD$
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*/
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/*
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* Interrupt entry points for external interrupts triggered by the 8259A
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* master and slave interrupt controllers.
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*/
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#include <machine/asmacros.h>
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#include "assym.s"
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/*
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* Macros for interrupt interrupt entry, call to handler, and exit.
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*/
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#define INTR(irq_num, vec_name) \
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.text ; \
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SUPERALIGN_TEXT ; \
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IDTVEC(vec_name) ; \
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PUSH_FRAME ; \
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FAKE_MCOUNT(TF_RIP(%rsp)) ; \
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movl $irq_num, %edi; /* pass the IRQ */ \
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call atpic_handle_intr ; \
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MEXITCOUNT ; \
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jmp doreti
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INTR(0, atpic_intr0)
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INTR(1, atpic_intr1)
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INTR(2, atpic_intr2)
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INTR(3, atpic_intr3)
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INTR(4, atpic_intr4)
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INTR(5, atpic_intr5)
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INTR(6, atpic_intr6)
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INTR(7, atpic_intr7)
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INTR(8, atpic_intr8)
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INTR(9, atpic_intr9)
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INTR(10, atpic_intr10)
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INTR(11, atpic_intr11)
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INTR(12, atpic_intr12)
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INTR(13, atpic_intr13)
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INTR(14, atpic_intr14)
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INTR(15, atpic_intr15)
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