254e4e5b77
When a DMA request using bounce pages completes, a swi is triggered to schedule pending DMA requests using the just-freed bounce pages. For a long time this bus_dma swi has been tied to a "virtual memory" swi (swi_vm). However, all of the swi_vm implementations are the same and consist of checking a flag (busdma_swi_pending) which is always true and if set calling busdma_swi. I suspect this dates back to the pre-SMPng days and that the intention was for swi_vm to serve as a mux. However, in the current scheme there's no need for the mux. Instead, remove swi_vm and vm_ih. Each bus_dma implementation that uses bounce pages is responsible for creating its own swi (busdma_ih) which it now schedules directly. This swi invokes busdma_swi directly removing the need for busdma_swi_pending. One consequence is that the swi now works on RISC-V which had previously failed to invoke busdma_swi from swi_vm. Reviewed by: imp, kib Sponsored by: Netflix Differential Revision: https://reviews.freebsd.org/D33447
86 lines
3.0 KiB
C
86 lines
3.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1995 Bruce D. Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: src/sys/i386/include/md_var.h,v 1.35 2000/02/20 20:51:23 bsd
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* JNPR: md_var.h,v 1.4 2006/10/16 12:30:34 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_MD_VAR_H_
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#define _MACHINE_MD_VAR_H_
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#include <machine/regnum.h>
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/*
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* Miscellaneous machine-dependent declarations.
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*/
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extern long Maxmem;
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extern char cpu_board[];
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extern char cpu_model[];
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extern char sigcode[];
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extern int szsigcode;
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#if defined(__mips_n32) || defined(__mips_n64)
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extern char sigcode32[];
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extern int szsigcode32;
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#endif
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extern vm_offset_t kstack0;
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extern vm_offset_t kernel_kseg0_end;
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uint32_t MipsFPID(void);
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void MipsSaveCurFPState(struct thread *);
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void fork_trampoline(void);
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uintptr_t MipsEmulateBranch(struct trapframe *, uintptr_t, int, uintptr_t);
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void MipsSwitchFPState(struct thread *, struct trapframe *);
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int is_cacheable_mem(vm_paddr_t addr);
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void mips_wait(void);
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#define MIPS_DEBUG 0
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#if MIPS_DEBUG
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#define MIPS_DEBUG_PRINT(fmt, args...) printf("%s: " fmt "\n" , __FUNCTION__ , ## args)
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#else
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#define MIPS_DEBUG_PRINT(fmt, args...)
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#endif
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void mips_vector_init(void);
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void mips_cpu_init(void);
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void mips_pcpu0_init(void);
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void mips_proc0_init(void);
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void mips_postboot_fixup(void);
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void cpu_identify(void);
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void cpu_switch_set_userlocal(void) __asm(__STRING(cpu_switch_set_userlocal));
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struct dumperinfo;
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struct minidumpstate;
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int cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *);
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#endif /* !_MACHINE_MD_VAR_H_ */
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