272489fe59
the implementation can guarantee forward progress in the event of a stuck interrupt or interrupt storm. This is especially critical for fast interrupt handlers, as they can cause a hard hang in that case. When first called, arm_get_next_irq() is passed -1. Obtained from: Juniper Networks, Inc.
631 lines
17 KiB
C
631 lines
17 KiB
C
/* $NetBSD: ixp425.c,v 1.10 2005/12/11 12:16:51 christos Exp $ */
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/*
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* Copyright (c) 2003
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* Ichiro FUKUHARA <ichiro@ichiro.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ichiro FUKUHARA.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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#include <arm/xscale/ixp425/ixp425_intr.h>
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#include <dev/pci/pcireg.h>
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volatile uint32_t intr_enabled;
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uint32_t intr_steer = 0;
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/* ixp43x et. al have +32 IRQ's */
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volatile uint32_t intr_enabled2;
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uint32_t intr_steer2 = 0;
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struct ixp425_softc *ixp425_softc = NULL;
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static int ixp425_probe(device_t);
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static void ixp425_identify(driver_t *, device_t);
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static int ixp425_attach(device_t);
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/*
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* Return a mask of the "fuse" bits that identify
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* which h/w features are present.
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* NB: assumes the expansion bus is mapped.
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*/
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uint32_t
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ixp4xx_read_feature_bits(void)
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{
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uint32_t bits = ~IXPREG(IXP425_EXP_VBASE + EXP_FCTRL_OFFSET);
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bits &= ~EXP_FCTRL_RESVD;
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if (!cpu_is_ixp46x())
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bits &= ~EXP_FCTRL_IXP46X_ONLY;
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return bits;
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}
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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static const uint8_t int2gpio[32] __attribute__ ((aligned(32))) = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#0 -> INT#5 */
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0x00, 0x01, /* GPIO#0 -> GPIO#1 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#8 -> INT#13 */
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0xff, 0xff, 0xff, 0xff, 0xff, /* INT#14 -> INT#18 */
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0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* GPIO#2 -> GPIO#7 */
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0x08, 0x09, 0x0a, 0x0b, 0x0c, /* GPIO#8 -> GPIO#12 */
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0xff, 0xff /* INT#30 -> INT#31 */
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};
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static __inline u_int32_t
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ixp425_irq2gpio_bit(int irq)
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{
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return (1U << int2gpio[irq]);
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}
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#ifdef DDB
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#include <ddb/ddb.h>
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DB_SHOW_COMMAND(gpio, db_show_gpio)
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{
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static const char *itype[8] = {
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[GPIO_TYPE_ACT_HIGH] = "act-high",
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[GPIO_TYPE_ACT_LOW] = "act-low",
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[GPIO_TYPE_EDG_RISING] = "edge-rising",
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[GPIO_TYPE_EDG_FALLING] = "edge-falling",
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[GPIO_TYPE_TRANSITIONAL]= "transitional",
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[5] = "type-5", [6] = "type-6", [7] = "type-7"
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};
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uint32_t gpoutr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
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uint32_t gpoer = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
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uint32_t gpinr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPINR);
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uint32_t gpit1r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT1R);
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uint32_t gpit2r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT2R);
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int i, j;
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db_printf("GPOUTR %08x GPOER %08x GPINR %08x GPISR %08x\n",
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gpoutr, gpoer, gpinr,
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GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPISR));
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db_printf("GPIT1R %08x GPIT2R %08x GPCLKR %08x\n",
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gpit1r, gpit2r, GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPCLKR));
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for (i = 0; i < 16; i++) {
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db_printf("[%2d] out %u in %u %-3s", i,
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(gpoutr>>i)&1, (gpinr>>i)&1, (gpoer>>i)&1 ? "in" : "out");
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for (j = 0; j < 32; j++)
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if (int2gpio[j] == i) {
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db_printf(" irq %2u %s", j, itype[
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(((i & 8) ? gpit2r : gpit1r) >> (3*(i&7)))
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& 7]);
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break;
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}
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db_printf("\n");
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}
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}
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#endif
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void
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arm_mask_irq(uintptr_t nb)
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{
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int i;
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i = disable_interrupts(I32_bit);
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if (nb < 32) {
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intr_enabled &= ~(1 << nb);
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ixp425_set_intrmask();
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} else {
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intr_enabled2 &= ~(1 << (nb - 32));
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ixp435_set_intrmask();
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}
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restore_interrupts(i);
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/*XXX; If it's a GPIO interrupt, ACK it know. Can it be a problem ?*/
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if (nb < 32 && ((1 << nb) & IXP425_INT_GPIOMASK))
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IXPREG(IXP425_GPIO_VBASE + IXP425_GPIO_GPISR) =
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ixp425_irq2gpio_bit(nb);
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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int i;
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i = disable_interrupts(I32_bit);
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if (nb < 32) {
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intr_enabled |= (1 << nb);
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ixp425_set_intrmask();
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} else {
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intr_enabled2 |= (1 << (nb - 32));
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ixp435_set_intrmask();
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}
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restore_interrupts(i);
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}
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static __inline uint32_t
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ixp425_irq_read(void)
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{
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return IXPREG(IXP425_INT_STATUS) & intr_enabled;
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}
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static __inline uint32_t
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ixp435_irq_read(void)
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{
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return IXPREG(IXP435_INT_STATUS2) & intr_enabled2;
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}
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int
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arm_get_next_irq(int last __unused)
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{
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uint32_t irq;
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if ((irq = ixp425_irq_read()))
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return (ffs(irq) - 1);
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if (cpu_is_ixp43x() && (irq = ixp435_irq_read()))
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return (32 + ffs(irq) - 1);
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return (-1);
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}
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void
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cpu_reset(void)
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{
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bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE,
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IXP425_OST_WDOG_KEY, OST_WDOG_KEY_MAJICK);
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bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE,
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IXP425_OST_WDOG, 0);
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bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE,
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IXP425_OST_WDOG_ENAB, OST_WDOG_ENAB_RST_ENA |
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OST_WDOG_ENAB_CNT_ENA);
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printf("Reset failed!\n");
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for(;;);
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}
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static void
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ixp425_identify(driver_t *driver, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "ixp", 0);
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}
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static int
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ixp425_probe(device_t dev)
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{
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device_set_desc(dev, "Intel IXP4XX");
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return (0);
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}
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static int
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ixp425_attach(device_t dev)
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{
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struct ixp425_softc *sc;
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device_printf(dev, "%b\n", ixp4xx_read_feature_bits(), EXP_FCTRL_BITS);
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sc = device_get_softc(dev);
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sc->sc_iot = &ixp425_bs_tag;
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KASSERT(ixp425_softc == NULL, ("%s called twice?", __func__));
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ixp425_softc = sc;
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intr_enabled = 0;
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ixp425_set_intrmask();
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ixp425_set_intrsteer();
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if (cpu_is_ixp43x()) {
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intr_enabled2 = 0;
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ixp435_set_intrmask();
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ixp435_set_intrsteer();
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}
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if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL, 0xffffffff, 0xff, 0xffffffff, 0,
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NULL, NULL, &sc->sc_dmat))
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panic("%s: failed to create dma tag", __func__);
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sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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sc->sc_irq_rman.rm_descr = "IXP4XX IRQs";
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if (rman_init(&sc->sc_irq_rman) != 0 ||
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rman_manage_region(&sc->sc_irq_rman, 0, cpu_is_ixp43x() ? 63 : 31) != 0)
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panic("%s: failed to set up IRQ rman", __func__);
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "IXP4XX Memory";
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if (rman_init(&sc->sc_mem_rman) != 0 ||
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rman_manage_region(&sc->sc_mem_rman, 0, ~0) != 0)
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panic("%s: failed to set up memory rman", __func__);
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BUS_ADD_CHILD(dev, 0, "pcib", 0);
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BUS_ADD_CHILD(dev, 0, "ixpclk", 0);
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BUS_ADD_CHILD(dev, 0, "ixpiic", 0);
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/* XXX move to hints? */
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BUS_ADD_CHILD(dev, 0, "ixpwdog", 0);
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/* attach wired devices via hints */
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bus_enumerate_hinted_children(dev);
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if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE,
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0, &sc->sc_gpio_ioh))
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panic("%s: unable to map GPIO registers", __func__);
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if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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0, &sc->sc_exp_ioh))
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panic("%s: unable to map Expansion Bus registers", __func__);
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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return (0);
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}
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static void
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ixp425_hinted_child(device_t bus, const char *dname, int dunit)
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{
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device_t child;
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struct ixp425_ivar *ivar;
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child = BUS_ADD_CHILD(bus, 0, dname, dunit);
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ivar = IXP425_IVAR(child);
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resource_int_value(dname, dunit, "addr", &ivar->addr);
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resource_int_value(dname, dunit, "irq", &ivar->irq);
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}
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static device_t
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ixp425_add_child(device_t dev, int order, const char *name, int unit)
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{
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device_t child;
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struct ixp425_ivar *ivar;
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child = device_add_child_ordered(dev, order, name, unit);
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if (child == NULL)
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return NULL;
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ivar = malloc(sizeof(struct ixp425_ivar), M_DEVBUF, M_NOWAIT);
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if (ivar == NULL) {
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device_delete_child(dev, child);
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return NULL;
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}
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ivar->addr = 0;
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ivar->irq = -1;
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device_set_ivars(child, ivar);
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return child;
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}
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static int
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ixp425_read_ivar(device_t bus, device_t child, int which, u_char *result)
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{
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struct ixp425_ivar *ivar = IXP425_IVAR(child);
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switch (which) {
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case IXP425_IVAR_ADDR:
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if (ivar->addr != 0) {
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*(uint32_t *)result = ivar->addr;
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return 0;
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}
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break;
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case IXP425_IVAR_IRQ:
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if (ivar->irq != -1) {
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*(int *)result = ivar->irq;
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return 0;
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}
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break;
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}
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return EINVAL;
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}
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/*
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* NB: This table handles P->V translations for regions setup with
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* static mappings in initarm. This is used solely for calls to
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* bus_alloc_resource_any; anything done with bus_space_map is
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* handled elsewhere and does not require an entry here.
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*
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* XXX this table is also used by uart_cpu_getdev via getvbase
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* (hence the public api)
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*/
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struct hwvtrans {
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uint32_t hwbase;
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uint32_t size;
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uint32_t vbase;
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int isa4x; /* XXX needs special bus space tag */
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};
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static const struct hwvtrans *
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gethwvtrans(uint32_t hwbase, uint32_t size)
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{
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static const struct hwvtrans hwvtrans[] = {
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/* NB: needed only for uart_cpu_getdev */
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{ .hwbase = IXP425_UART0_HWBASE,
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.size = IXP425_REG_SIZE,
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.vbase = IXP425_UART0_VBASE,
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.isa4x = 1 },
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{ .hwbase = IXP425_UART1_HWBASE,
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.size = IXP425_REG_SIZE,
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.vbase = IXP425_UART1_VBASE,
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.isa4x = 1 },
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{ .hwbase = IXP425_PCI_HWBASE,
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.size = IXP425_PCI_SIZE,
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.vbase = IXP425_PCI_VBASE },
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{ .hwbase = IXP425_PCI_MEM_HWBASE,
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.size = IXP425_PCI_MEM_SIZE,
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.vbase = IXP425_PCI_MEM_VBASE },
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{ .hwbase = IXP425_EXP_BUS_CS0_HWBASE,
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.size = IXP425_EXP_BUS_CS0_SIZE,
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.vbase = IXP425_EXP_BUS_CS0_VBASE },
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/* NB: needed for ixp435 ehci controllers */
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{ .hwbase = IXP435_USB1_HWBASE,
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.size = IXP435_USB1_SIZE,
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.vbase = IXP435_USB1_VBASE },
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{ .hwbase = IXP435_USB2_HWBASE,
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.size = IXP435_USB2_SIZE,
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.vbase = IXP435_USB2_VBASE },
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#ifdef CAMBRIA_GPS_VBASE
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{ .hwbase = CAMBRIA_GPS_HWBASE,
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.size = CAMBRIA_GPS_SIZE,
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.vbase = CAMBRIA_GPS_VBASE },
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#endif
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#ifdef CAMBRIA_RS485_VBASE
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{ .hwbase = CAMBRIA_RS485_HWBASE,
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.size = CAMBRIA_RS485_SIZE,
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.vbase = CAMBRIA_RS485_VBASE },
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#endif
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};
|
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int i;
|
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|
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for (i = 0; i < sizeof hwvtrans / sizeof *hwvtrans; i++) {
|
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if (hwbase >= hwvtrans[i].hwbase &&
|
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hwbase + size <= hwvtrans[i].hwbase + hwvtrans[i].size)
|
|
return &hwvtrans[i];
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}
|
|
return NULL;
|
|
}
|
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|
|
/* XXX for uart_cpu_getdev */
|
|
int
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|
getvbase(uint32_t hwbase, uint32_t size, uint32_t *vbase)
|
|
{
|
|
const struct hwvtrans *hw;
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|
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hw = gethwvtrans(hwbase, size);
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if (hw == NULL)
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return (ENOENT);
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*vbase = hwbase - hw->hwbase + hw->vbase;
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return (0);
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}
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static struct resource *
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ixp425_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
|
|
{
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|
struct ixp425_softc *sc = device_get_softc(dev);
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const struct hwvtrans *vtrans;
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struct resource *rv;
|
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uint32_t addr;
|
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int needactivate = flags & RF_ACTIVE;
|
|
int irq;
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|
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flags &= ~RF_ACTIVE;
|
|
switch (type) {
|
|
case SYS_RES_IRQ:
|
|
/* override per hints */
|
|
if (BUS_READ_IVAR(dev, child, IXP425_IVAR_IRQ, &irq) == 0)
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start = end = irq;
|
|
rv = rman_reserve_resource(&sc->sc_irq_rman, start, end, count,
|
|
flags, child);
|
|
if (rv != NULL)
|
|
rman_set_rid(rv, *rid);
|
|
break;
|
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|
|
case SYS_RES_MEMORY:
|
|
/* override per hints */
|
|
if (BUS_READ_IVAR(dev, child, IXP425_IVAR_ADDR, &addr) == 0) {
|
|
start = addr;
|
|
/* XXX use nominal window to check for mapping */
|
|
vtrans = gethwvtrans(start, 0x1000);
|
|
if (vtrans != NULL) {
|
|
/*
|
|
* Assign the entire mapped region; this may
|
|
* not be correct but without more info from
|
|
* the caller we cannot tell.
|
|
*/
|
|
end = start + vtrans->size -
|
|
(start - vtrans->hwbase);
|
|
if (bootverbose)
|
|
device_printf(child,
|
|
"%s: assign 0x%lx:0x%lx%s\n",
|
|
__func__, start, end - start,
|
|
vtrans->isa4x ? " A4X" : "");
|
|
}
|
|
} else
|
|
vtrans = gethwvtrans(start, end - start);
|
|
if (vtrans == NULL) {
|
|
/* likely means above table needs to be updated */
|
|
device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n",
|
|
__func__, start, end - start);
|
|
return NULL;
|
|
}
|
|
rv = rman_reserve_resource(&sc->sc_mem_rman, start, end,
|
|
end - start, flags, child);
|
|
if (rv == NULL) {
|
|
device_printf(child, "%s: cannot reserve 0x%lx:0x%lx\n",
|
|
__func__, start, end - start);
|
|
return NULL;
|
|
}
|
|
rman_set_rid(rv, *rid);
|
|
break;
|
|
default:
|
|
rv = NULL;
|
|
break;
|
|
}
|
|
if (rv != NULL && needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv)) {
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
return (rv);
|
|
}
|
|
|
|
static int
|
|
ixp425_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
/* NB: no private resources, just release */
|
|
return rman_release_resource(r);
|
|
}
|
|
|
|
static int
|
|
ixp425_activate_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct ixp425_softc *sc = device_get_softc(dev);
|
|
const struct hwvtrans *vtrans;
|
|
|
|
if (type == SYS_RES_MEMORY) {
|
|
vtrans = gethwvtrans(rman_get_start(r), rman_get_size(r));
|
|
if (vtrans == NULL) { /* NB: should not happen */
|
|
device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n",
|
|
__func__, rman_get_start(r), rman_get_size(r));
|
|
return (ENOENT);
|
|
}
|
|
if (vtrans->isa4x)
|
|
rman_set_bustag(r, &ixp425_a4x_bs_tag);
|
|
else
|
|
rman_set_bustag(r, sc->sc_iot);
|
|
rman_set_bushandle(r, vtrans->vbase);
|
|
}
|
|
return (rman_activate_resource(r));
|
|
}
|
|
|
|
static int
|
|
ixp425_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
/* NB: no private resources, just deactive */
|
|
return (rman_deactivate_resource(r));
|
|
}
|
|
|
|
static __inline void
|
|
get_masks(struct resource *res, uint32_t *mask, uint32_t *mask2)
|
|
{
|
|
int i;
|
|
|
|
*mask = 0;
|
|
for (i = rman_get_start(res); i < 32 && i <= rman_get_end(res); i++)
|
|
*mask |= 1 << i;
|
|
*mask2 = 0;
|
|
for (; i <= rman_get_end(res); i++)
|
|
*mask2 |= 1 << (i - 32);
|
|
}
|
|
|
|
static __inline void
|
|
update_masks(uint32_t mask, uint32_t mask2)
|
|
{
|
|
|
|
intr_enabled = mask;
|
|
ixp425_set_intrmask();
|
|
if (cpu_is_ixp43x()) {
|
|
intr_enabled2 = mask2;
|
|
ixp435_set_intrmask();
|
|
}
|
|
}
|
|
|
|
static int
|
|
ixp425_setup_intr(device_t dev, device_t child,
|
|
struct resource *res, int flags, driver_filter_t *filt,
|
|
driver_intr_t *intr, void *arg, void **cookiep)
|
|
{
|
|
uint32_t mask, mask2;
|
|
|
|
BUS_SETUP_INTR(device_get_parent(dev), child, res, flags, filt, intr,
|
|
arg, cookiep);
|
|
|
|
get_masks(res, &mask, &mask2);
|
|
update_masks(intr_enabled | mask, intr_enabled2 | mask2);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
ixp425_teardown_intr(device_t dev, device_t child, struct resource *res,
|
|
void *cookie)
|
|
{
|
|
uint32_t mask, mask2;
|
|
|
|
get_masks(res, &mask, &mask2);
|
|
update_masks(intr_enabled &~ mask, intr_enabled2 &~ mask2);
|
|
|
|
return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
|
|
}
|
|
|
|
static device_method_t ixp425_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, ixp425_probe),
|
|
DEVMETHOD(device_attach, ixp425_attach),
|
|
DEVMETHOD(device_identify, ixp425_identify),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_add_child, ixp425_add_child),
|
|
DEVMETHOD(bus_hinted_child, ixp425_hinted_child),
|
|
DEVMETHOD(bus_read_ivar, ixp425_read_ivar),
|
|
|
|
DEVMETHOD(bus_alloc_resource, ixp425_alloc_resource),
|
|
DEVMETHOD(bus_release_resource, ixp425_release_resource),
|
|
DEVMETHOD(bus_activate_resource, ixp425_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, ixp425_deactivate_resource),
|
|
DEVMETHOD(bus_setup_intr, ixp425_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, ixp425_teardown_intr),
|
|
|
|
{0, 0},
|
|
};
|
|
|
|
static driver_t ixp425_driver = {
|
|
"ixp",
|
|
ixp425_methods,
|
|
sizeof(struct ixp425_softc),
|
|
};
|
|
static devclass_t ixp425_devclass;
|
|
|
|
DRIVER_MODULE(ixp, nexus, ixp425_driver, ixp425_devclass, 0, 0);
|