29b44b096f
The read DMA request logic operation is based on having sufficient available space in the transmit data buffer (TXMBUF) before a read DMA can be requested. There are four read DMA channels that use the TXMBUF, and the logic checks if the available free space in the TXMBUF is large enough for all the data in the four Send Buffers for which buffer descriptors have been fetched. The Enable_Request signal is asserted only if the free TXMBUF space is larger than the sum of the four DMA length registers. The power-up default value of BGE_RDMA_LSO_CRPTEN_CTRL register bit 25 (bit 21 on BCM5720) is zero, which selects the DMA length registers to connect to the input of the adder block. The DMA length registers are asynchronously reset following BCM5719/BCM5720 power-up, and due to the lack of synchronous deassertion of the length registers reset signal these resisters may contain uninitialized values following the reset deassertion. In the case of the failure the uninitialized DMA length register values added up to more than the TXMBUF size, which prevented the assertion of the Enable_Request signal and any subsequent read DMA to start. This lockup condition is the root cause of failing to generate any transmit traffic. To workaround the issue, select alternate output of multiplexers and transmit the first four Ethernet frames. This overwrites the DMA length registers with valid values. Reported by: Geans Pin <geanspin@broadcom.com> Reviewed by: Geans Pin <geanspin@broadcom.com> |
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| if_bge.c | ||
| if_bgereg.h | ||